tests/fixedbugs/issue65/asm.go

// +build ignore

package main

import (
	. "github.com/mmcloughlin/avo/build"
	. "github.com/mmcloughlin/avo/operand"
	. "github.com/mmcloughlin/avo/reg"
)

func main() {
	TEXT("Issue65", NOSPLIT, "func()")
	VINSERTI128(Imm(1), Y0.AsX(), Y1, Y2)
	RET()
	Generate()
}
tests/fixedbugs: regression test for issue 100 (#129) Adds a regression test based on klauspost/compress#186. This necessitated some related changes: * Mark "RET" as a terminal instruction * printer refactor to maintain compatibility with asmfmt * Tweaks to other regression tests to ensure they are run correctly in CI Updates #100 #65 #8 2020-01-27 21:05:33 -08:00			`// +build ignore`
reg,pass: refactor allocation of aliased registers (#121) Issue #100 demonstrated that register allocation for aliased registers is fundamentally broken. The root of the issue is that currently accesses to the same virtual register with different masks are treated as different registers. This PR takes a different approach: * Liveness analysis is masked: we now properly consider which parts of a register are live * Register allocation produces a mapping from virtual to physical ID, and aliasing is applied later In addition, a new pass ZeroExtend32BitOutputs accounts for the fact that 32-bit writes in 64-bit mode should actually be treated as 64-bit writes (the result is zero-extended). Closes #100 2020-01-22 22:50:40 -08:00
			`package main`

			`import (`
			`. "github.com/mmcloughlin/avo/build"`
			`. "github.com/mmcloughlin/avo/operand"`
			`. "github.com/mmcloughlin/avo/reg"`
			`)`

			`func main() {`
			`TEXT("Issue65", NOSPLIT, "func()")`
			`VINSERTI128(Imm(1), Y0.AsX(), Y1, Y2)`
			`RET()`
			`Generate()`
			`}`