tests/fixedbugs/issue100/issue100.s

// Code generated by command: go run asm.go -out issue100.s -stubs stub.go. DO NOT EDIT.

#include "textflag.h"

// func Issue100() uint64
TEXT ·Issue100(SB), NOSPLIT, $0-8
	XORQ AX, AX
	MOVQ $0x00000001, CX
	ADDQ CX, AX
	MOVQ $0x00000002, CX
	ADDQ CX, AX
	MOVQ $0x00000003, CX
	ADDQ CX, AX
	MOVQ $0x00000004, CX
	ADDQ CX, AX
	MOVQ $0x00000005, CX
	ADDQ CX, AX
	MOVQ $0x00000006, CX
	ADDQ CX, AX
	MOVQ $0x00000007, CX
	ADDQ CX, AX
	MOVQ $0x00000008, CX
	ADDQ CX, AX
	MOVQ $0x00000009, CX
	ADDQ CX, AX
	MOVQ $0x0000000a, CX
	ADDQ CX, AX
	MOVQ $0x0000000b, CX
	ADDQ CX, AX
	MOVQ $0x0000000c, CX
	ADDQ CX, AX
	MOVQ $0x0000000d, CX
	ADDQ CX, AX
	MOVQ $0x0000000e, CX
	ADDQ CX, AX
	MOVQ $0x0000000f, CX
	ADDQ CX, AX
	MOVQ $0x00000010, CX
	ADDQ CX, AX
	MOVQ $0x00000011, CX
	ADDQ CX, AX
	MOVQ $0x00000012, CX
	ADDQ CX, AX
	MOVQ $0x00000013, CX
	ADDQ CX, AX
	MOVQ $0x00000014, CX
	ADDQ CX, AX
	MOVQ $0x00000015, CX
	ADDQ CX, AX
	MOVQ $0x00000016, CX
	ADDQ CX, AX
	MOVQ $0x00000017, CX
	ADDQ CX, AX
	MOVQ $0x00000018, CX
	ADDQ CX, AX
	MOVQ $0x00000019, CX
	ADDQ CX, AX
	MOVQ $0x0000001a, CX
	ADDQ CX, AX
	MOVQ $0x0000001b, CX
	ADDQ CX, AX
	MOVQ $0x0000001c, CX
	ADDQ CX, AX
	MOVQ $0x0000001d, CX
	ADDQ CX, AX
	MOVQ $0x0000001e, CX
	ADDQ CX, AX
	MOVQ $0x0000001f, CX
	ADDQ CX, AX
	MOVQ $0x00000020, CX
	ADDQ CX, AX
	MOVQ $0x00000021, CX
	ADDQ CX, AX
	MOVQ $0x00000022, CX
	ADDQ CX, AX
	MOVQ $0x00000023, CX
	ADDQ CX, AX
	MOVQ $0x00000024, CX
	ADDQ CX, AX
	MOVQ $0x00000025, CX
	ADDQ CX, AX
	MOVQ $0x00000026, CX
	ADDQ CX, AX
	MOVQ $0x00000027, CX
	ADDQ CX, AX
	MOVQ $0x00000028, CX
	ADDQ CX, AX
	MOVQ $0x00000029, CX
	ADDQ CX, AX
	MOVQ $0x0000002a, CX
	ADDQ CX, AX
	MOVQ $0x0000002b, CX
	ADDQ CX, AX
	MOVQ $0x0000002c, CX
	ADDQ CX, AX
	MOVQ $0x0000002d, CX
	ADDQ CX, AX
	MOVQ $0x0000002e, CX
	ADDQ CX, AX
	MOVQ $0x0000002f, CX
	ADDQ CX, AX
	MOVQ $0x00000030, CX
	ADDQ CX, AX
	MOVQ $0x00000031, CX
	ADDQ CX, AX
	MOVQ $0x00000032, CX
	ADDQ CX, AX
	MOVQ $0x00000033, CX
	ADDQ CX, AX
	MOVQ $0x00000034, CX
	ADDQ CX, AX
	MOVQ $0x00000035, CX
	ADDQ CX, AX
	MOVQ $0x00000036, CX
	ADDQ CX, AX
	MOVQ $0x00000037, CX
	ADDQ CX, AX
	MOVQ $0x00000038, CX
	ADDQ CX, AX
	MOVQ $0x00000039, CX
	ADDQ CX, AX
	MOVQ $0x0000003a, CX
	ADDQ CX, AX
	MOVQ $0x0000003b, CX
	ADDQ CX, AX
	MOVQ $0x0000003c, CX
	ADDQ CX, AX
	MOVQ $0x0000003d, CX
	ADDQ CX, AX
	MOVQ $0x0000003e, CX
	ADDQ CX, AX
	MOVQ $0x0000003f, CX
	ADDQ CX, AX
	MOVQ $0x00000040, CX
	ADDQ CX, AX
	MOVQ $0x00000041, CX
	ADDQ CX, AX
	MOVQ $0x00000042, CX
	ADDQ CX, AX
	MOVQ $0x00000043, CX
	ADDQ CX, AX
	MOVQ $0x00000044, CX
	ADDQ CX, AX
	MOVQ $0x00000045, CX
	ADDQ CX, AX
	MOVQ $0x00000046, CX
	ADDQ CX, AX
	MOVQ $0x00000047, CX
	ADDQ CX, AX
	MOVQ $0x00000048, CX
	ADDQ CX, AX
	MOVQ $0x00000049, CX
	ADDQ CX, AX
	MOVQ $0x0000004a, CX
	ADDQ CX, AX
	MOVQ $0x0000004b, CX
	ADDQ CX, AX
	MOVQ $0x0000004c, CX
	ADDQ CX, AX
	MOVQ $0x0000004d, CX
	ADDQ CX, AX
	MOVQ $0x0000004e, CX
	ADDQ CX, AX
	MOVQ $0x0000004f, CX
	ADDQ CX, AX
	MOVQ $0x00000050, CX
	ADDQ CX, AX
	MOVQ $0x00000051, CX
	ADDQ CX, AX
	MOVQ $0x00000052, CX
	ADDQ CX, AX
	MOVQ $0x00000053, CX
	ADDQ CX, AX
	MOVQ $0x00000054, CX
	ADDQ CX, AX
	MOVQ $0x00000055, CX
	ADDQ CX, AX
	MOVQ $0x00000056, CX
	ADDQ CX, AX
	MOVQ $0x00000057, CX
	ADDQ CX, AX
	MOVQ $0x00000058, CX
	ADDQ CX, AX
	MOVQ $0x00000059, CX
	ADDQ CX, AX
	MOVQ $0x0000005a, CX
	ADDQ CX, AX
	MOVQ $0x0000005b, CX
	ADDQ CX, AX
	MOVQ $0x0000005c, CX
	ADDQ CX, AX
	MOVQ $0x0000005d, CX
	ADDQ CX, AX
	MOVQ $0x0000005e, CX
	ADDQ CX, AX
	MOVQ $0x0000005f, CX
	ADDQ CX, AX
	MOVQ $0x00000060, CX
	ADDQ CX, AX
	MOVQ $0x00000061, CX
	ADDQ CX, AX
	MOVQ $0x00000062, CX
	ADDQ CX, AX
	MOVQ $0x00000063, CX
	ADDQ CX, AX
	MOVQ $0x00000064, CX
	ADDQ CX, AX
	MOVQ AX, ret+0(FP)
	RET
reg,pass: refactor allocation of aliased registers (#121) Issue #100 demonstrated that register allocation for aliased registers is fundamentally broken. The root of the issue is that currently accesses to the same virtual register with different masks are treated as different registers. This PR takes a different approach: * Liveness analysis is masked: we now properly consider which parts of a register are live * Register allocation produces a mapping from virtual to physical ID, and aliasing is applied later In addition, a new pass ZeroExtend32BitOutputs accounts for the fact that 32-bit writes in 64-bit mode should actually be treated as 64-bit writes (the result is zero-extended). Closes #100 2020-01-22 22:50:40 -08:00			`// Code generated by command: go run asm.go -out issue100.s -stubs stub.go. DO NOT EDIT.`

			`#include "textflag.h"`

			`// func Issue100() uint64`
			`TEXT ·Issue100(SB), NOSPLIT, $0-8`
			`XORQ AX, AX`
			`MOVQ $0x00000001, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000002, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000003, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000004, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000005, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000006, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000007, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000008, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000009, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000000f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000010, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000011, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000012, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000013, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000014, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000015, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000016, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000017, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000018, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000019, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000001f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000020, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000021, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000022, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000023, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000024, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000025, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000026, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000027, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000028, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000029, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000002f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000030, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000031, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000032, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000033, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000034, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000035, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000036, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000037, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000038, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000039, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000003f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000040, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000041, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000042, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000043, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000044, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000045, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000046, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000047, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000048, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000049, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000004f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000050, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000051, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000052, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000053, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000054, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000055, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000056, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000057, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000058, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000059, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005a, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005b, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005c, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005d, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005e, CX`
			`ADDQ CX, AX`
			`MOVQ $0x0000005f, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000060, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000061, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000062, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000063, CX`
			`ADDQ CX, AX`
			`MOVQ $0x00000064, CX`
			`ADDQ CX, AX`
			`MOVQ AX, ret+0(FP)`
			`RET`