This commit is contained in:
2026-03-06 20:14:02 +00:00
parent 39eaafea25
commit 33208a2356
146 changed files with 673 additions and 1986 deletions

View File

@@ -10,17 +10,17 @@ import (
"strconv"
"strings"
"github.com/mmcloughlin/avo/internal/inst"
"github.com/mmcloughlin/avo/internal/opcodescsv"
"github.com/mmcloughlin/avo/internal/opcodesextra"
"github.com/mmcloughlin/avo/internal/opcodesxml"
"sources.truenas.cloud/code/avo/internal/inst"
"sources.truenas.cloud/code/avo/internal/opcodescsv"
"sources.truenas.cloud/code/avo/internal/opcodesextra"
"sources.truenas.cloud/code/avo/internal/opcodesxml"
)
// This file is a mess. Some of this complexity is unavoidable, since the state
// of x86 instruction databases is also a mess, especially when it comes to
// idiosyncrasies of the Go assembler implementation. Some of the complexity is
// probably avoidable by migrating to using Intel XED
// (https://github.com/mmcloughlin/avo/issues/23), but for now this is an unholy
// (https://sources.truenas.cloud/code/avo/issues/23), but for now this is an unholy
// mix of PeachPy's Opcodes database and Go's x86 CSV file.
//
// The goal is simply to keep as much of the uglyness in this file as possible,
@@ -796,7 +796,7 @@ func evexLLsize(f opcodesxml.Form) int {
// version is to encode suffixes, and these are represented by other instruction
// forms.
//
// TODO(mbm): restrict use of vector registers https://github.com/mmcloughlin/avo/issues/146
// TODO(mbm): restrict use of vector registers https://sources.truenas.cloud/code/avo/issues/146
func vexevex(fs []inst.Form) ([]inst.Form, error) {
// Group forms by deduping ID.
byid := map[string][]inst.Form{}