diff --git a/build/zinstructions.go b/build/zinstructions.go index 5385692..a0cffd7 100644 --- a/build/zinstructions.go +++ b/build/zinstructions.go @@ -49989,6 +49989,346 @@ func (c *Context) VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) { // Operates on the global context. func VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) { ctx.VGETMANTSS_Z(i, mx, x, k, x1) } +// VGF2P8AFFINEINVQB: Galois Field Affine Transformation Inverse. +// +// Forms: +// +// VGF2P8AFFINEINVQB imm8 m128 xmm xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm ymm +// VGF2P8AFFINEINVQB imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB imm8 m512 zmm zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm zmm +// VGF2P8AFFINEINVQB imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB instruction to the active function. +func (c *Context) VGF2P8AFFINEINVQB(ops ...operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEINVQB(ops...)) +} + +// VGF2P8AFFINEINVQB: Galois Field Affine Transformation Inverse. +// +// Forms: +// +// VGF2P8AFFINEINVQB imm8 m128 xmm xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm ymm +// VGF2P8AFFINEINVQB imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB imm8 m512 zmm zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm zmm +// VGF2P8AFFINEINVQB imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEINVQB(ops ...operand.Op) { ctx.VGF2P8AFFINEINVQB(ops...) } + +// VGF2P8AFFINEINVQB_BCST: Galois Field Affine Transformation Inverse (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm ymm +// +// Construct and append a VGF2P8AFFINEINVQB.BCST instruction to the active function. +func (c *Context) VGF2P8AFFINEINVQB_BCST(ops ...operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEINVQB_BCST(ops...)) +} + +// VGF2P8AFFINEINVQB_BCST: Galois Field Affine Transformation Inverse (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm ymm +// +// Construct and append a VGF2P8AFFINEINVQB.BCST instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEINVQB_BCST(ops ...operand.Op) { ctx.VGF2P8AFFINEINVQB_BCST(ops...) } + +// VGF2P8AFFINEINVQB_BCST_Z: Galois Field Affine Transformation Inverse (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB.BCST.Z instruction to the active function. +func (c *Context) VGF2P8AFFINEINVQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEINVQB_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VGF2P8AFFINEINVQB_BCST_Z: Galois Field Affine Transformation Inverse (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB.BCST.Z instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEINVQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + ctx.VGF2P8AFFINEINVQB_BCST_Z(i, m, xyz, k, xyz1) +} + +// VGF2P8AFFINEINVQB_Z: Galois Field Affine Transformation Inverse (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB.Z instruction to the active function. +func (c *Context) VGF2P8AFFINEINVQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEINVQB_Z(i, mxyz, xyz, k, xyz1)) +} + +// VGF2P8AFFINEINVQB_Z: Galois Field Affine Transformation Inverse (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEINVQB.Z instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEINVQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + ctx.VGF2P8AFFINEINVQB_Z(i, mxyz, xyz, k, xyz1) +} + +// VGF2P8AFFINEQB: Galois Field Affine Transformation. +// +// Forms: +// +// VGF2P8AFFINEQB imm8 m128 xmm xmm +// VGF2P8AFFINEQB imm8 m256 ymm ymm +// VGF2P8AFFINEQB imm8 xmm xmm xmm +// VGF2P8AFFINEQB imm8 ymm ymm ymm +// VGF2P8AFFINEQB imm8 m512 zmm k zmm +// VGF2P8AFFINEQB imm8 m512 zmm zmm +// VGF2P8AFFINEQB imm8 zmm zmm k zmm +// VGF2P8AFFINEQB imm8 zmm zmm zmm +// VGF2P8AFFINEQB imm8 m128 xmm k xmm +// VGF2P8AFFINEQB imm8 m256 ymm k ymm +// VGF2P8AFFINEQB imm8 xmm xmm k xmm +// VGF2P8AFFINEQB imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB instruction to the active function. +func (c *Context) VGF2P8AFFINEQB(ops ...operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEQB(ops...)) +} + +// VGF2P8AFFINEQB: Galois Field Affine Transformation. +// +// Forms: +// +// VGF2P8AFFINEQB imm8 m128 xmm xmm +// VGF2P8AFFINEQB imm8 m256 ymm ymm +// VGF2P8AFFINEQB imm8 xmm xmm xmm +// VGF2P8AFFINEQB imm8 ymm ymm ymm +// VGF2P8AFFINEQB imm8 m512 zmm k zmm +// VGF2P8AFFINEQB imm8 m512 zmm zmm +// VGF2P8AFFINEQB imm8 zmm zmm k zmm +// VGF2P8AFFINEQB imm8 zmm zmm zmm +// VGF2P8AFFINEQB imm8 m128 xmm k xmm +// VGF2P8AFFINEQB imm8 m256 ymm k ymm +// VGF2P8AFFINEQB imm8 xmm xmm k xmm +// VGF2P8AFFINEQB imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEQB(ops ...operand.Op) { ctx.VGF2P8AFFINEQB(ops...) } + +// VGF2P8AFFINEQB_BCST: Galois Field Affine Transformation (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm ymm +// +// Construct and append a VGF2P8AFFINEQB.BCST instruction to the active function. +func (c *Context) VGF2P8AFFINEQB_BCST(ops ...operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEQB_BCST(ops...)) +} + +// VGF2P8AFFINEQB_BCST: Galois Field Affine Transformation (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm ymm +// +// Construct and append a VGF2P8AFFINEQB.BCST instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEQB_BCST(ops ...operand.Op) { ctx.VGF2P8AFFINEQB_BCST(ops...) } + +// VGF2P8AFFINEQB_BCST_Z: Galois Field Affine Transformation (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB.BCST.Z instruction to the active function. +func (c *Context) VGF2P8AFFINEQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEQB_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VGF2P8AFFINEQB_BCST_Z: Galois Field Affine Transformation (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB.BCST.Z instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + ctx.VGF2P8AFFINEQB_BCST_Z(i, m, xyz, k, xyz1) +} + +// VGF2P8AFFINEQB_Z: Galois Field Affine Transformation (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEQB.Z imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB.Z instruction to the active function. +func (c *Context) VGF2P8AFFINEQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VGF2P8AFFINEQB_Z(i, mxyz, xyz, k, xyz1)) +} + +// VGF2P8AFFINEQB_Z: Galois Field Affine Transformation (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEQB.Z imm8 ymm ymm k ymm +// +// Construct and append a VGF2P8AFFINEQB.Z instruction to the active function. +// Operates on the global context. +func VGF2P8AFFINEQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VGF2P8AFFINEQB_Z(i, mxyz, xyz, k, xyz1) } + +// VGF2P8MULB: Galois Field Multiply Bytes. +// +// Forms: +// +// VGF2P8MULB m128 xmm xmm +// VGF2P8MULB m256 ymm ymm +// VGF2P8MULB xmm xmm xmm +// VGF2P8MULB ymm ymm ymm +// VGF2P8MULB m512 zmm k zmm +// VGF2P8MULB m512 zmm zmm +// VGF2P8MULB zmm zmm k zmm +// VGF2P8MULB zmm zmm zmm +// VGF2P8MULB m128 xmm k xmm +// VGF2P8MULB m256 ymm k ymm +// VGF2P8MULB xmm xmm k xmm +// VGF2P8MULB ymm ymm k ymm +// +// Construct and append a VGF2P8MULB instruction to the active function. +func (c *Context) VGF2P8MULB(ops ...operand.Op) { + c.addinstruction(x86.VGF2P8MULB(ops...)) +} + +// VGF2P8MULB: Galois Field Multiply Bytes. +// +// Forms: +// +// VGF2P8MULB m128 xmm xmm +// VGF2P8MULB m256 ymm ymm +// VGF2P8MULB xmm xmm xmm +// VGF2P8MULB ymm ymm ymm +// VGF2P8MULB m512 zmm k zmm +// VGF2P8MULB m512 zmm zmm +// VGF2P8MULB zmm zmm k zmm +// VGF2P8MULB zmm zmm zmm +// VGF2P8MULB m128 xmm k xmm +// VGF2P8MULB m256 ymm k ymm +// VGF2P8MULB xmm xmm k xmm +// VGF2P8MULB ymm ymm k ymm +// +// Construct and append a VGF2P8MULB instruction to the active function. +// Operates on the global context. +func VGF2P8MULB(ops ...operand.Op) { ctx.VGF2P8MULB(ops...) } + +// VGF2P8MULB_Z: Galois Field Multiply Bytes (Zeroing Masking). +// +// Forms: +// +// VGF2P8MULB.Z m512 zmm k zmm +// VGF2P8MULB.Z zmm zmm k zmm +// VGF2P8MULB.Z m128 xmm k xmm +// VGF2P8MULB.Z m256 ymm k ymm +// VGF2P8MULB.Z xmm xmm k xmm +// VGF2P8MULB.Z ymm ymm k ymm +// +// Construct and append a VGF2P8MULB.Z instruction to the active function. +func (c *Context) VGF2P8MULB_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VGF2P8MULB_Z(mxyz, xyz, k, xyz1)) +} + +// VGF2P8MULB_Z: Galois Field Multiply Bytes (Zeroing Masking). +// +// Forms: +// +// VGF2P8MULB.Z m512 zmm k zmm +// VGF2P8MULB.Z zmm zmm k zmm +// VGF2P8MULB.Z m128 xmm k xmm +// VGF2P8MULB.Z m256 ymm k ymm +// VGF2P8MULB.Z xmm xmm k xmm +// VGF2P8MULB.Z ymm ymm k ymm +// +// Construct and append a VGF2P8MULB.Z instruction to the active function. +// Operates on the global context. +func VGF2P8MULB_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VGF2P8MULB_Z(mxyz, xyz, k, xyz1) } + // VHADDPD: Packed Double-FP Horizontal Add. // // Forms: diff --git a/build/zinstructions_test.go b/build/zinstructions_test.go index f937cb1..db18d2a 100644 --- a/build/zinstructions_test.go +++ b/build/zinstructions_test.go @@ -2085,6 +2085,16 @@ func TestContextInstructions(t *testing.T) { ctx.VGETMANTSS_SAE(opimm8, opxmm, opxmm, opk, opxmm) ctx.VGETMANTSS_SAE_Z(opimm8, opxmm, opxmm, opk, opxmm) ctx.VGETMANTSS_Z(opimm8, opm32, opxmm, opk, opxmm) + ctx.VGF2P8AFFINEINVQB(opimm8, opm128, opxmm, opxmm) + ctx.VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opzmm, opk, opzmm) + ctx.VGF2P8AFFINEINVQB_BCST_Z(opimm8, opm64, opzmm, opk, opzmm) + ctx.VGF2P8AFFINEINVQB_Z(opimm8, opm512, opzmm, opk, opzmm) + ctx.VGF2P8AFFINEQB(opimm8, opm128, opxmm, opxmm) + ctx.VGF2P8AFFINEQB_BCST(opimm8, opm64, opzmm, opk, opzmm) + ctx.VGF2P8AFFINEQB_BCST_Z(opimm8, opm64, opzmm, opk, opzmm) + ctx.VGF2P8AFFINEQB_Z(opimm8, opm512, opzmm, opk, opzmm) + ctx.VGF2P8MULB(opm128, opxmm, opxmm) + ctx.VGF2P8MULB_Z(opm512, opzmm, opk, opzmm) ctx.VHADDPD(opm128, opxmm, opxmm) ctx.VHADDPS(opm128, opxmm, opxmm) ctx.VHSUBPD(opm128, opxmm, opxmm) diff --git a/internal/inst/types.go b/internal/inst/types.go index 0d65b96..8d591c9 100644 --- a/internal/inst/types.go +++ b/internal/inst/types.go @@ -40,6 +40,13 @@ func (i Instruction) IsConditionalBranch() bool { return i.IsBranch() && i.Opcode != "JMP" } +// Clone the instruction. +func (i Instruction) Clone() Instruction { + c := i + c.Forms = i.Forms.Clone() + return c +} + // Forms is a collection of instruction forms. type Forms []Form @@ -78,6 +85,15 @@ func (fs Forms) IsNiladic() bool { return len(a) == 1 && a[0] == 0 } +// Clone the instruction forms. +func (fs Forms) Clone() Forms { + cs := make(Forms, 0, len(fs)) + for _, f := range fs { + cs = append(cs, f.Clone()) + } + return cs +} + // Form specifies one accepted set of operands for an instruction. type Form struct { // Instruction sets this instruction form requires. diff --git a/internal/inst/ztable.go b/internal/inst/ztable.go index dd1b04f..bfb50fa 100644 --- a/internal/inst/ztable.go +++ b/internal/inst/ztable.go @@ -50572,6 +50572,816 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VGF2P8AFFINEINVQB", + Summary: "Galois Field Affine Transformation Inverse", + Forms: []Form{ + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + }, + }, + { + Opcode: "VGF2P8AFFINEQB", + Summary: "Galois Field Affine Transformation", + Forms: []Form{ + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + }, + }, + { + Opcode: "VGF2P8MULB", + Summary: "Galois Field Multiply Bytes", + Forms: []Form{ + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX", "GFNI"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x3, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512F", "GFNI"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VL", "GFNI"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + }, + }, { Opcode: "VHADDPD", Summary: "Packed Double-FP Horizontal Add", diff --git a/internal/load/load.go b/internal/load/load.go index 3c3aa31..0cdb674 100644 --- a/internal/load/load.go +++ b/internal/load/load.go @@ -80,8 +80,7 @@ func (l *Loader) Load() ([]inst.Instruction, error) { Summary: i.Summary, } } - forms := l.forms(opcode, f) - im[opcode].Forms = append(im[opcode].Forms, forms...) + im[opcode].Forms = append(im[opcode].Forms, l.form(opcode, f)) } } } @@ -91,6 +90,11 @@ func (l *Loader) Load() ([]inst.Instruction, error) { im[e.Opcode] = e } + // Generate additional AVX-512 forms. + for _, i := range im { + i.Forms = avx512forms(i.Opcode, i.Forms) + } + // Merge aliased forms. This is primarily for MOVQ (issue #50). for _, a := range aliases { if existing, found := im[a.From]; found { @@ -122,6 +126,7 @@ func (l *Loader) Load() ([]inst.Instruction, error) { // Convert to a slice. Sort instructions and forms for reproducibility. is := make([]inst.Instruction, 0, len(im)) for _, i := range im { + sortforms(i.Forms) is = append(is, *i) } @@ -129,10 +134,6 @@ func (l *Loader) Load() ([]inst.Instruction, error) { return is[i].Opcode < is[j].Opcode }) - for _, i := range im { - sortforms(i.Forms) - } - return is, nil } @@ -309,7 +310,7 @@ func (l Loader) gonames(f opcodesxml.Form) []string { return []string{n} } -func (l Loader) forms(opcode string, f opcodesxml.Form) []inst.Form { +func (l Loader) form(opcode string, f opcodesxml.Form) inst.Form { // Map operands to avo format and ensure correct order. ops := operands(f.Operands) @@ -366,34 +367,14 @@ func (l Loader) forms(opcode string, f opcodesxml.Form) []inst.Form { } sort.Strings(isas) - // Initialize form. - form := inst.Form{ + // Build form. + return inst.Form{ ISA: isas, Operands: ops, ImplicitOperands: implicits, EncodingType: enctype(f), CancellingInputs: f.CancellingInputs, } - - // Apply modification stages to produce final list of forms. - stages := []func(string, inst.Form) []inst.Form{ - avx512rounding, - avx512sae, - avx512bcst, - avx512masking, - avx512zeroing, - } - - forms := []inst.Form{form} - for _, stage := range stages { - var next []inst.Form - for _, f := range forms { - next = append(next, stage(opcode, f)...) - } - forms = next - } - - return forms } // operands maps Opcodes XML operands to avo format. Returned in Intel order. @@ -414,6 +395,31 @@ func operand(op opcodesxml.Operand) inst.Operand { } } +// avx512forms processes AVX-512 operands and expands them into additional +// instruction forms as expected by the Go assembler. +// +// See: https://go.dev/wiki/AVX512 +func avx512forms(opcode string, forms []inst.Form) []inst.Form { + // Apply modification stages to produce final list of forms. + stages := []func(string, inst.Form) []inst.Form{ + avx512rounding, + avx512sae, + avx512bcst, + avx512masking, + avx512zeroing, + } + + for _, stage := range stages { + var next []inst.Form + for _, f := range forms { + next = append(next, stage(opcode, f)...) + } + forms = next + } + + return forms +} + // avx512rounding handles AVX-512 embedded rounding. Opcodes database represents // these as {er} operands, whereas Go uses instruction suffixes. Remove the // operand if present and set the corresponding flag. @@ -825,7 +831,6 @@ func vexevex(fs []inst.Form) ([]inst.Form, error) { } if group[0].EncodingType != inst.EncodingTypeVEX || group[1].EncodingType != inst.EncodingTypeEVEX { - fmt.Println(group) return nil, errors.New("expected pair of VEX/EVEX encoded forms") } diff --git a/internal/opcodesextra/gfni.go b/internal/opcodesextra/gfni.go new file mode 100644 index 0000000..353ec45 --- /dev/null +++ b/internal/opcodesextra/gfni.go @@ -0,0 +1,283 @@ +package opcodesextra + +import "github.com/mmcloughlin/avo/internal/inst" + +// gfni is the "Galois Field New Instructions" instruction set. +var gfni = []*inst.Instruction{ + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L2250-L2269 + // + // {as: AVGF2P8AFFINEINVQB, ytab: _yvgf2p8affineinvqb, prefix: Pavx, op: opBytes{ + // avxEscape | vex128 | vex66 | vex0F3A | vexW1, 0xCF, + // avxEscape | vex256 | vex66 | vex0F3A | vexW1, 0xCF, + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0xCF, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0xCF, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0xCF, + // }}, + // {as: AVGF2P8AFFINEQB, ytab: _yvgf2p8affineinvqb, prefix: Pavx, op: opBytes{ + // avxEscape | vex128 | vex66 | vex0F3A | vexW1, 0xCE, + // avxEscape | vex256 | vex66 | vex0F3A | vexW1, 0xCE, + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0xCE, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0xCE, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0xCE, + // }}, + // {as: AVGF2P8MULB, ytab: _yvandnpd, prefix: Pavx, op: opBytes{ + // avxEscape | vex128 | vex66 | vex0F38 | vexW0, 0xCF, + // avxEscape | vex256 | vex66 | vex0F38 | vexW0, 0xCF, + // avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexZeroingEnabled, 0xCF, + // avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexZeroingEnabled, 0xCF, + // avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexZeroingEnabled, 0xCF, + // + { + Opcode: "VGF2P8AFFINEQB", + Summary: "Galois Field Affine Transformation", + Forms: vgf2p8affineqb, + }, + { + Opcode: "VGF2P8AFFINEINVQB", + Summary: "Galois Field Affine Transformation Inverse", + Forms: vgf2p8affineqb, + }, + { + Opcode: "VGF2P8MULB", + Summary: "Galois Field Multiply Bytes", + Forms: vgf2p8mulb, + }, +} + +// VGF2P8AFFINEQB and VGF2P8AFFINEINVQB forms. +// +// See: https://www.felixcloutier.com/x86/gf2p8affineqb +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L483-L492 +// +// var _yvgf2p8affineinvqb = []ytab{ +// {zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yxm, Yxr, Yxr}}, +// {zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yym, Yyr, Yyr}}, +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YxmEvex, YxrEvex, YxrEvex}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YxmEvex, YxrEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YymEvex, YyrEvex, YyrEvex}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YymEvex, YyrEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, Yzm, Yzr, Yzr}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, Yzm, Yzr, Yknot0, Yzr}}, +// } +var vgf2p8affineqb = inst.Forms{ + // VEX.128.66.0F3A.W1 CE /r /ib VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8 + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "m128", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + // VEX.256.66.0F3A.W1 CE /r /ib VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8 + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "m256", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + // EVEX.128.66.0F3A.W1 CE /r /ib VGF2P8AFFINEQB xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst, imm8 + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "m128/m64bcst", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + // EVEX.256.66.0F3A.W1 CE /r /ib VGF2P8AFFINEQB ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst, imm8 + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "m256/m64bcst", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + // EVEX.512.66.0F3A.W1 CE /r /ib VGF2P8AFFINEQB zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst, imm8 + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512F", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "imm8", Action: inst.R}, + {Type: "m512/m64bcst", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512F", "GFNI"}, + }, +} + +// VGF2P8MULB forms. +// +// See: https://www.felixcloutier.com/x86/gf2p8mulb +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L137-L146 +// +// var _yvandnpd = []ytab{ +// {zcase: Zvex_rm_v_r, zoffset: 2, args: argList{Yxm, Yxr, Yxr}}, +// {zcase: Zvex_rm_v_r, zoffset: 2, args: argList{Yym, Yyr, Yyr}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex, YxrEvex}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YxmEvex, YxrEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex, YyrEvex}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YymEvex, YyrEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}}, +// } +var vgf2p8mulb = inst.Forms{ + // VEX.128.66.0F38.W0 CF /r VGF2P8MULB xmm1, xmm2, xmm3/m128 + { + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "m128", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + // VEX.256.66.0F38.W0 CF /r VGF2P8MULB ymm1, ymm2, ymm3/m256 + { + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "m256", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeVEX, + ISA: []string{"AVX", "GFNI"}, + }, + // EVEX.128.66.0F38.W0 CF /r VGF2P8MULB xmm1{k1}{z}, xmm2, xmm3/m128 + { + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "m128", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + // EVEX.256.66.0F38.W0 CF /r VGF2P8MULB ymm1{k1}{z}, ymm2, ymm3/m256 + { + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "m256", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512VL", "GFNI"}, + }, + // EVEX.512.66.0F38.W0 CF /r VGF2P8MULB zmm1{k1}{z}, zmm2, zmm3/m512 + { + Operands: []inst.Operand{ + {Type: "zmm", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512F", "GFNI"}, + }, + { + Operands: []inst.Operand{ + {Type: "m512", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + ISA: []string{"AVX512F", "GFNI"}, + }, +} diff --git a/internal/opcodesextra/instructions.go b/internal/opcodesextra/instructions.go index b25537a..39a4249 100644 --- a/internal/opcodesextra/instructions.go +++ b/internal/opcodesextra/instructions.go @@ -6,13 +6,28 @@ import "github.com/mmcloughlin/avo/internal/inst" // sets of extra instructions. var sets = [][]*inst.Instruction{ movlqzx, + gfni, } // Instructions returns a list of extras to add to the instructions database. +// +// Note that instructions returned are expected to be injected into the loading +// process, as if they had been read out of the Opcodes database. As such, they +// are not expected to be in the final form required for the instruction +// database. For example, AVX-512 instruction form transformations do not need +// to be applied, and operand types such as xmm{k}{z} or m256/m64bcst may be +// used for brevity. func Instructions() []*inst.Instruction { + // Concatenate and clone the instruction lists. It can be convenient for + // forms lists and other data structures to be shared in the curated lists, + // but we want to return distinct copies here to avoid subtle bugs in + // consumers. var is []*inst.Instruction for _, set := range sets { - is = append(is, set...) + for _, i := range set { + c := i.Clone() + is = append(is, &c) + } } return is } diff --git a/x86/zctors.go b/x86/zctors.go index 93897c2..85a2ee6 100644 --- a/x86/zctors.go +++ b/x86/zctors.go @@ -21950,6 +21950,158 @@ func VGETMANTSS_Z(i, mx, x, k, x1 operand.Op) (*intrep.Instruction, error) { return build(opcVGETMANTSS.Forms(), sffxs{sffxZ}, []operand.Op{i, mx, x, k, x1}) } +// VGF2P8AFFINEINVQB: Galois Field Affine Transformation Inverse. +// +// Forms: +// +// VGF2P8AFFINEINVQB imm8 m128 xmm xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm ymm +// VGF2P8AFFINEINVQB imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB imm8 m512 zmm zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB imm8 zmm zmm zmm +// VGF2P8AFFINEINVQB imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB imm8 ymm ymm k ymm +func VGF2P8AFFINEINVQB(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEINVQB.Forms(), sffxs{}, ops) +} + +// VGF2P8AFFINEINVQB_BCST: Galois Field Affine Transformation Inverse (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEINVQB.BCST imm8 m64 ymm ymm +func VGF2P8AFFINEINVQB_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEINVQB.Forms(), sffxs{sffxBCST}, ops) +} + +// VGF2P8AFFINEINVQB_BCST_Z: Galois Field Affine Transformation Inverse (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEINVQB.BCST.Z imm8 m64 ymm k ymm +func VGF2P8AFFINEINVQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEINVQB.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VGF2P8AFFINEINVQB_Z: Galois Field Affine Transformation Inverse (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEINVQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEINVQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEINVQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEINVQB.Z imm8 ymm ymm k ymm +func VGF2P8AFFINEINVQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEINVQB.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VGF2P8AFFINEQB: Galois Field Affine Transformation. +// +// Forms: +// +// VGF2P8AFFINEQB imm8 m128 xmm xmm +// VGF2P8AFFINEQB imm8 m256 ymm ymm +// VGF2P8AFFINEQB imm8 xmm xmm xmm +// VGF2P8AFFINEQB imm8 ymm ymm ymm +// VGF2P8AFFINEQB imm8 m512 zmm k zmm +// VGF2P8AFFINEQB imm8 m512 zmm zmm +// VGF2P8AFFINEQB imm8 zmm zmm k zmm +// VGF2P8AFFINEQB imm8 zmm zmm zmm +// VGF2P8AFFINEQB imm8 m128 xmm k xmm +// VGF2P8AFFINEQB imm8 m256 ymm k ymm +// VGF2P8AFFINEQB imm8 xmm xmm k xmm +// VGF2P8AFFINEQB imm8 ymm ymm k ymm +func VGF2P8AFFINEQB(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEQB.Forms(), sffxs{}, ops) +} + +// VGF2P8AFFINEQB_BCST: Galois Field Affine Transformation (Broadcast). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST imm8 m64 zmm zmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST imm8 m64 xmm xmm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm k ymm +// VGF2P8AFFINEQB.BCST imm8 m64 ymm ymm +func VGF2P8AFFINEQB_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEQB.Forms(), sffxs{sffxBCST}, ops) +} + +// VGF2P8AFFINEQB_BCST_Z: Galois Field Affine Transformation (Broadcast, Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.BCST.Z imm8 m64 zmm k zmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 xmm k xmm +// VGF2P8AFFINEQB.BCST.Z imm8 m64 ymm k ymm +func VGF2P8AFFINEQB_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEQB.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VGF2P8AFFINEQB_Z: Galois Field Affine Transformation (Zeroing Masking). +// +// Forms: +// +// VGF2P8AFFINEQB.Z imm8 m512 zmm k zmm +// VGF2P8AFFINEQB.Z imm8 zmm zmm k zmm +// VGF2P8AFFINEQB.Z imm8 m128 xmm k xmm +// VGF2P8AFFINEQB.Z imm8 m256 ymm k ymm +// VGF2P8AFFINEQB.Z imm8 xmm xmm k xmm +// VGF2P8AFFINEQB.Z imm8 ymm ymm k ymm +func VGF2P8AFFINEQB_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8AFFINEQB.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VGF2P8MULB: Galois Field Multiply Bytes. +// +// Forms: +// +// VGF2P8MULB m128 xmm xmm +// VGF2P8MULB m256 ymm ymm +// VGF2P8MULB xmm xmm xmm +// VGF2P8MULB ymm ymm ymm +// VGF2P8MULB m512 zmm k zmm +// VGF2P8MULB m512 zmm zmm +// VGF2P8MULB zmm zmm k zmm +// VGF2P8MULB zmm zmm zmm +// VGF2P8MULB m128 xmm k xmm +// VGF2P8MULB m256 ymm k ymm +// VGF2P8MULB xmm xmm k xmm +// VGF2P8MULB ymm ymm k ymm +func VGF2P8MULB(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8MULB.Forms(), sffxs{}, ops) +} + +// VGF2P8MULB_Z: Galois Field Multiply Bytes (Zeroing Masking). +// +// Forms: +// +// VGF2P8MULB.Z m512 zmm k zmm +// VGF2P8MULB.Z zmm zmm k zmm +// VGF2P8MULB.Z m128 xmm k xmm +// VGF2P8MULB.Z m256 ymm k ymm +// VGF2P8MULB.Z xmm xmm k xmm +// VGF2P8MULB.Z ymm ymm k ymm +func VGF2P8MULB_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVGF2P8MULB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + // VHADDPD: Packed Double-FP Horizontal Add. // // Forms: diff --git a/x86/zctors_test.go b/x86/zctors_test.go index aa169f6..c7b707f 100644 --- a/x86/zctors_test.go +++ b/x86/zctors_test.go @@ -23273,6 +23273,252 @@ func TestVGETMANTSS_ZValidFormsNoError(t *testing.T) { } } +func TestVGF2P8AFFINEINVQBValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEINVQB(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEINVQB_BCSTValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST(opimm8, opm64, opymm, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEINVQB_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEINVQB_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEINVQB_ZValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEINVQB_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEQBValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEQB(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEQB_BCSTValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST(opimm8, opm64, opymm, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEQB_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEQB_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8AFFINEQB_ZValidFormsNoError(t *testing.T) { + if _, err := VGF2P8AFFINEQB_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8AFFINEQB_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8MULBValidFormsNoError(t *testing.T) { + if _, err := VGF2P8MULB(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + +func TestVGF2P8MULB_ZValidFormsNoError(t *testing.T) { + if _, err := VGF2P8MULB_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VGF2P8MULB_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } +} + func TestVHADDPDValidFormsNoError(t *testing.T) { if _, err := VHADDPD(opm128, opxmm, opxmm); err != nil { t.Fatal(err) diff --git a/x86/zoptab.go b/x86/zoptab.go index bbea9c4..34608a4 100644 --- a/x86/zoptab.go +++ b/x86/zoptab.go @@ -307,6 +307,9 @@ const ( isasAVX512BW_AVX512VL isasAVX512ER isasFMA3 + isasAVX_GFNI + isasAVX512F_GFNI + isasAVX512VL_GFNI isasAVX512CD_AVX512VL isasAVX512CD isasAVX_PCLMULQDQ @@ -366,6 +369,9 @@ var isaslisttable = [][]string{ {"AVX512BW", "AVX512VL"}, {"AVX512ER"}, {"FMA3"}, + {"AVX", "GFNI"}, + {"AVX512F", "GFNI"}, + {"AVX512VL", "GFNI"}, {"AVX512CD", "AVX512VL"}, {"AVX512CD"}, {"AVX", "PCLMULQDQ"}, @@ -1257,6 +1263,9 @@ const ( opcVGETMANTPS opcVGETMANTSD opcVGETMANTSS + opcVGF2P8AFFINEINVQB + opcVGF2P8AFFINEQB + opcVGF2P8MULB opcVHADDPD opcVHADDPS opcVHSUBPD @@ -2550,6 +2559,9 @@ var opcstringtable = []string{ "VGETMANTPS", "VGETMANTSD", "VGETMANTSS", + "VGF2P8AFFINEINVQB", + "VGF2P8AFFINEQB", + "VGF2P8MULB", "VHADDPD", "VHADDPS", "VHSUBPD", @@ -7872,6 +7884,78 @@ var forms = []form{ {opcVGETMANTSS, sffxsclsSAE_Z, 0, isasAVX512F, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, {opcVGETMANTSS, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, {opcVGETMANTSS, sffxsclsSAE, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST_Z, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST_Z, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST_Z, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEINVQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST_Z, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512F_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST_Z, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST_Z, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsBCST, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8AFFINEQB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8AFFINEQB, sffxsclsZ, 0, isasAVX512VL_GFNI, 5, oprnds{{uint8(oprndtypeIMM8), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX_GFNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX_GFNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX_GFNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX_GFNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512F_GFNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512F_GFNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512F_GFNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVGF2P8MULB, sffxsclsNIL, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVGF2P8MULB, sffxsclsZ, 0, isasAVX512VL_GFNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, {opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, {opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, {opcVHADDPD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, @@ -15232,216 +15316,215 @@ var opcformstable = [][]form{ forms[4865:4895], forms[4895:4904], forms[4904:4913], - forms[4913:4917], - forms[4917:4921], - forms[4921:4925], - forms[4925:4929], - forms[4929:4931], - forms[4931:4943], - forms[4943:4949], - forms[4949:4961], - forms[4961:4967], - forms[4967:4969], - forms[4969:4981], - forms[4981:4987], - forms[4987:4999], - forms[4999:5005], - forms[5005:5007], - forms[5007:5009], - forms[5009:5010], - forms[5010:5011], - forms[5011:5015], - forms[5015:5019], - forms[5019:5049], - forms[5049:5079], - forms[5079:5088], - forms[5088:5097], - forms[5097:5127], - forms[5127:5157], - forms[5157:5166], - forms[5166:5175], - forms[5175:5202], - forms[5202:5229], - forms[5229:5233], - forms[5233:5251], - forms[5251:5257], - forms[5257:5284], - forms[5284:5311], - forms[5311:5317], - forms[5317:5344], - forms[5344:5371], - forms[5371:5398], - forms[5398:5425], - forms[5425:5426], - forms[5426:5428], - forms[5428:5430], - forms[5430:5431], - forms[5431:5433], - forms[5433:5435], - forms[5435:5437], - forms[5437:5439], - forms[5439:5442], - forms[5442:5445], - forms[5445:5448], - forms[5448:5451], - forms[5451:5456], - forms[5456:5464], - forms[5464:5482], - forms[5482:5500], - forms[5500:5508], - forms[5508:5535], - forms[5535:5562], - forms[5562:5566], - forms[5566:5596], - forms[5596:5626], - forms[5626:5635], - forms[5635:5644], - forms[5644:5671], - forms[5671:5698], - forms[5698:5716], + forms[4913:4940], + forms[4940:4967], + forms[4967:4985], + forms[4985:4989], + forms[4989:4993], + forms[4993:4997], + forms[4997:5001], + forms[5001:5003], + forms[5003:5015], + forms[5015:5021], + forms[5021:5033], + forms[5033:5039], + forms[5039:5041], + forms[5041:5053], + forms[5053:5059], + forms[5059:5071], + forms[5071:5077], + forms[5077:5079], + forms[5079:5081], + forms[5081:5082], + forms[5082:5083], + forms[5083:5087], + forms[5087:5091], + forms[5091:5121], + forms[5121:5151], + forms[5151:5160], + forms[5160:5169], + forms[5169:5199], + forms[5199:5229], + forms[5229:5238], + forms[5238:5247], + forms[5247:5274], + forms[5274:5301], + forms[5301:5305], + forms[5305:5323], + forms[5323:5329], + forms[5329:5356], + forms[5356:5383], + forms[5383:5389], + forms[5389:5416], + forms[5416:5443], + forms[5443:5470], + forms[5470:5497], + forms[5497:5498], + forms[5498:5500], + forms[5500:5502], + forms[5502:5503], + forms[5503:5505], + forms[5505:5507], + forms[5507:5509], + forms[5509:5511], + forms[5511:5514], + forms[5514:5517], + forms[5517:5520], + forms[5520:5523], + forms[5523:5528], + forms[5528:5536], + forms[5536:5554], + forms[5554:5572], + forms[5572:5580], + forms[5580:5607], + forms[5607:5634], + forms[5634:5638], + forms[5638:5668], + forms[5668:5698], + forms[5698:5707], + forms[5707:5716], forms[5716:5743], forms[5743:5770], forms[5770:5788], forms[5788:5815], - forms[5815:5833], - forms[5833:5860], - forms[5860:5878], - forms[5878:5896], - forms[5896:5923], - forms[5923:5950], + forms[5815:5842], + forms[5842:5860], + forms[5860:5887], + forms[5887:5905], + forms[5905:5932], + forms[5932:5950], forms[5950:5968], - forms[5968:5986], - forms[5986:6004], - forms[6004:6022], + forms[5968:5995], + forms[5995:6022], forms[6022:6040], forms[6040:6058], - forms[6058:6062], - forms[6062:6089], - forms[6089:6093], - forms[6093:6120], - forms[6120:6147], - forms[6147:6174], - forms[6174:6192], - forms[6192:6210], - forms[6210:6214], - forms[6214:6232], - forms[6232:6259], - forms[6259:6286], + forms[6058:6076], + forms[6076:6094], + forms[6094:6112], + forms[6112:6130], + forms[6130:6134], + forms[6134:6161], + forms[6161:6165], + forms[6165:6192], + forms[6192:6219], + forms[6219:6246], + forms[6246:6264], + forms[6264:6282], + forms[6282:6286], forms[6286:6304], - forms[6304:6308], - forms[6308:6312], - forms[6312:6339], - forms[6339:6366], - forms[6366:6369], - forms[6369:6372], - forms[6372:6399], - forms[6399:6426], - forms[6426:6428], - forms[6428:6440], - forms[6440:6458], - forms[6458:6474], - forms[6474:6496], - forms[6496:6518], - forms[6518:6534], - forms[6534:6536], - forms[6536:6538], - forms[6538:6554], - forms[6554:6576], - forms[6576:6598], - forms[6598:6614], - forms[6614:6616], - forms[6616:6618], - forms[6618:6636], - forms[6636:6648], - forms[6648:6666], - forms[6666:6684], - forms[6684:6696], - forms[6696:6708], - forms[6708:6726], - forms[6726:6744], - forms[6744:6771], - forms[6771:6798], - forms[6798:6800], - forms[6800:6802], - forms[6802:6820], - forms[6820:6838], - forms[6838:6856], - forms[6856:6883], - forms[6883:6910], - forms[6910:6937], - forms[6937:6964], - forms[6964:6982], - forms[6982:7036], - forms[7036:7090], - forms[7090:7126], - forms[7126:7144], - forms[7144:7180], - forms[7180:7198], - forms[7198:7225], - forms[7225:7252], - forms[7252:7279], - forms[7279:7306], - forms[7306:7324], - forms[7324:7342], - forms[7342:7360], - forms[7360:7378], - forms[7378:7380], - forms[7380:7382], - forms[7382:7384], - forms[7384:7386], - forms[7386:7391], - forms[7391:7396], - forms[7396:7401], - forms[7401:7406], - forms[7406:7410], - forms[7410:7414], - forms[7414:7418], - forms[7418:7420], - forms[7420:7424], - forms[7424:7428], - forms[7428:7432], - forms[7432:7434], - forms[7434:7436], - forms[7436:7438], - forms[7438:7440], - forms[7440:7467], - forms[7467:7494], - forms[7494:7521], - forms[7521:7548], - forms[7548:7566], - forms[7566:7584], - forms[7584:7588], - forms[7588:7592], - forms[7592:7610], - forms[7610:7637], - forms[7637:7664], + forms[6304:6331], + forms[6331:6358], + forms[6358:6376], + forms[6376:6380], + forms[6380:6384], + forms[6384:6411], + forms[6411:6438], + forms[6438:6441], + forms[6441:6444], + forms[6444:6471], + forms[6471:6498], + forms[6498:6500], + forms[6500:6512], + forms[6512:6530], + forms[6530:6546], + forms[6546:6568], + forms[6568:6590], + forms[6590:6606], + forms[6606:6608], + forms[6608:6610], + forms[6610:6626], + forms[6626:6648], + forms[6648:6670], + forms[6670:6686], + forms[6686:6688], + forms[6688:6690], + forms[6690:6708], + forms[6708:6720], + forms[6720:6738], + forms[6738:6756], + forms[6756:6768], + forms[6768:6780], + forms[6780:6798], + forms[6798:6816], + forms[6816:6843], + forms[6843:6870], + forms[6870:6872], + forms[6872:6874], + forms[6874:6892], + forms[6892:6910], + forms[6910:6928], + forms[6928:6955], + forms[6955:6982], + forms[6982:7009], + forms[7009:7036], + forms[7036:7054], + forms[7054:7108], + forms[7108:7162], + forms[7162:7198], + forms[7198:7216], + forms[7216:7252], + forms[7252:7270], + forms[7270:7297], + forms[7297:7324], + forms[7324:7351], + forms[7351:7378], + forms[7378:7396], + forms[7396:7414], + forms[7414:7432], + forms[7432:7450], + forms[7450:7452], + forms[7452:7454], + forms[7454:7456], + forms[7456:7458], + forms[7458:7463], + forms[7463:7468], + forms[7468:7473], + forms[7473:7478], + forms[7478:7482], + forms[7482:7486], + forms[7486:7490], + forms[7490:7492], + forms[7492:7496], + forms[7496:7500], + forms[7500:7504], + forms[7504:7506], + forms[7506:7508], + forms[7508:7510], + forms[7510:7512], + forms[7512:7539], + forms[7539:7566], + forms[7566:7593], + forms[7593:7620], + forms[7620:7638], + forms[7638:7656], + forms[7656:7660], + forms[7660:7664], forms[7664:7682], - forms[7682:7700], - forms[7700:7727], - forms[7727:7754], + forms[7682:7709], + forms[7709:7736], + forms[7736:7754], forms[7754:7772], - forms[7772:7790], - forms[7790:7817], - forms[7817:7844], + forms[7772:7799], + forms[7799:7826], + forms[7826:7844], forms[7844:7862], - forms[7862:7880], - forms[7880:7907], - forms[7907:7934], + forms[7862:7889], + forms[7889:7916], + forms[7916:7934], forms[7934:7952], - forms[7952:7955], - forms[7955:7958], - forms[7958:7976], - forms[7976:7994], - forms[7994:7997], - forms[7997:8000], - forms[8000:8003], - forms[8003:8006], - forms[8006:8008], - forms[8008:8011], - forms[8011:8029], - forms[8029:8047], - forms[8047:8065], - forms[8065:8083], + forms[7952:7979], + forms[7979:8006], + forms[8006:8024], + forms[8024:8027], + forms[8027:8030], + forms[8030:8048], + forms[8048:8066], + forms[8066:8069], + forms[8069:8072], + forms[8072:8075], + forms[8075:8078], + forms[8078:8080], + forms[8080:8083], forms[8083:8101], forms[8101:8119], forms[8119:8137], @@ -15459,183 +15542,187 @@ var opcformstable = [][]form{ forms[8335:8353], forms[8353:8371], forms[8371:8389], - forms[8389:8392], - forms[8392:8410], - forms[8410:8428], - forms[8428:8446], - forms[8446:8464], + forms[8389:8407], + forms[8407:8425], + forms[8425:8443], + forms[8443:8461], + forms[8461:8464], forms[8464:8482], forms[8482:8500], forms[8500:8518], - forms[8518:8545], - forms[8545:8563], - forms[8563:8581], - forms[8581:8599], - forms[8599:8626], - forms[8626:8653], + forms[8518:8536], + forms[8536:8554], + forms[8554:8572], + forms[8572:8590], + forms[8590:8617], + forms[8617:8635], + forms[8635:8653], forms[8653:8671], forms[8671:8698], forms[8698:8725], - forms[8725:8734], - forms[8734:8743], - forms[8743:8747], - forms[8747:8774], - forms[8774:8801], - forms[8801:8828], - forms[8828:8855], - forms[8855:8882], - forms[8882:8909], - forms[8909:8936], - forms[8936:8963], - forms[8963:8990], - forms[8990:9017], - forms[9017:9023], - forms[9023:9026], - forms[9026:9029], - forms[9029:9032], - forms[9032:9035], - forms[9035:9053], - forms[9053:9080], - forms[9080:9098], - forms[9098:9116], - forms[9116:9120], - forms[9120:9124], - forms[9124:9128], - forms[9128:9173], - forms[9173:9179], - forms[9179:9224], - forms[9224:9251], - forms[9251:9278], - forms[9278:9296], - forms[9296:9332], - forms[9332:9377], - forms[9377:9422], - forms[9422:9449], - forms[9449:9476], - forms[9476:9494], - forms[9494:9530], - forms[9530:9575], - forms[9575:9581], - forms[9581:9626], - forms[9626:9653], - forms[9653:9680], - forms[9680:9698], - forms[9698:9734], - forms[9734:9752], - forms[9752:9779], - forms[9779:9806], + forms[8725:8743], + forms[8743:8770], + forms[8770:8797], + forms[8797:8806], + forms[8806:8815], + forms[8815:8819], + forms[8819:8846], + forms[8846:8873], + forms[8873:8900], + forms[8900:8927], + forms[8927:8954], + forms[8954:8981], + forms[8981:9008], + forms[9008:9035], + forms[9035:9062], + forms[9062:9089], + forms[9089:9095], + forms[9095:9098], + forms[9098:9101], + forms[9101:9104], + forms[9104:9107], + forms[9107:9125], + forms[9125:9152], + forms[9152:9170], + forms[9170:9188], + forms[9188:9192], + forms[9192:9196], + forms[9196:9200], + forms[9200:9245], + forms[9245:9251], + forms[9251:9296], + forms[9296:9323], + forms[9323:9350], + forms[9350:9368], + forms[9368:9404], + forms[9404:9449], + forms[9449:9494], + forms[9494:9521], + forms[9521:9548], + forms[9548:9566], + forms[9566:9602], + forms[9602:9647], + forms[9647:9653], + forms[9653:9698], + forms[9698:9725], + forms[9725:9752], + forms[9752:9770], + forms[9770:9806], forms[9806:9824], - forms[9824:9842], - forms[9842:9860], - forms[9860:9878], + forms[9824:9851], + forms[9851:9878], forms[9878:9896], - forms[9896:9923], - forms[9923:9950], - forms[9950:9954], - forms[9954:9966], - forms[9966:9984], - forms[9984:10002], - forms[10002:10014], - forms[10014:10026], - forms[10026:10044], - forms[10044:10062], - forms[10062:10074], - forms[10074:10092], - forms[10092:10119], - forms[10119:10146], + forms[9896:9914], + forms[9914:9932], + forms[9932:9950], + forms[9950:9968], + forms[9968:9995], + forms[9995:10022], + forms[10022:10026], + forms[10026:10038], + forms[10038:10056], + forms[10056:10074], + forms[10074:10086], + forms[10086:10098], + forms[10098:10116], + forms[10116:10134], + forms[10134:10146], forms[10146:10164], - forms[10164:10182], - forms[10182:10209], - forms[10209:10236], + forms[10164:10191], + forms[10191:10218], + forms[10218:10236], forms[10236:10254], - forms[10254:10258], - forms[10258:10285], - forms[10285:10312], - forms[10312:10342], - forms[10342:10372], - forms[10372:10381], - forms[10381:10390], - forms[10390:10417], - forms[10417:10444], - forms[10444:10450], - forms[10450:10456], - forms[10456:10468], - forms[10468:10480], - forms[10480:10489], - forms[10489:10498], - forms[10498:10502], - forms[10502:10504], - forms[10504:10531], - forms[10531:10558], - forms[10558:10564], - forms[10564:10570], - forms[10570:10600], - forms[10600:10630], - forms[10630:10639], - forms[10639:10648], - forms[10648:10652], - forms[10652:10656], - forms[10656:10658], - forms[10658:10660], - forms[10660:10687], - forms[10687:10714], - forms[10714:10720], - forms[10720:10726], - forms[10726:10738], - forms[10738:10750], - forms[10750:10759], - forms[10759:10768], - forms[10768:10772], - forms[10772:10774], - forms[10774:10804], - forms[10804:10834], - forms[10834:10843], - forms[10843:10852], - forms[10852:10855], - forms[10855:10858], - forms[10858:10861], - forms[10861:10864], - forms[10864:10882], - forms[10882:10900], - forms[10900:10918], - forms[10918:10936], - forms[10936:10963], - forms[10963:10990], - forms[10990:11020], - forms[11020:11050], - forms[11050:11059], - forms[11059:11068], - forms[11068:11069], - forms[11069:11099], - forms[11099:11129], - forms[11129:11138], - forms[11138:11147], - forms[11147:11151], - forms[11151:11155], - forms[11155:11158], - forms[11158:11161], - forms[11161:11188], - forms[11188:11215], - forms[11215:11242], - forms[11242:11269], - forms[11269:11296], - forms[11296:11323], - forms[11323:11324], - forms[11324:11325], - forms[11325:11327], - forms[11327:11329], - forms[11329:11331], - forms[11331:11333], - forms[11333:11336], - forms[11336:11341], - forms[11341:11346], - forms[11346:11351], - forms[11351:11352], - forms[11352:11353], - forms[11353:11359], - forms[11359:11367], - forms[11367:11369], - forms[11369:11371], - forms[11371:11379], - forms[11379:11387], + forms[10254:10281], + forms[10281:10308], + forms[10308:10326], + forms[10326:10330], + forms[10330:10357], + forms[10357:10384], + forms[10384:10414], + forms[10414:10444], + forms[10444:10453], + forms[10453:10462], + forms[10462:10489], + forms[10489:10516], + forms[10516:10522], + forms[10522:10528], + forms[10528:10540], + forms[10540:10552], + forms[10552:10561], + forms[10561:10570], + forms[10570:10574], + forms[10574:10576], + forms[10576:10603], + forms[10603:10630], + forms[10630:10636], + forms[10636:10642], + forms[10642:10672], + forms[10672:10702], + forms[10702:10711], + forms[10711:10720], + forms[10720:10724], + forms[10724:10728], + forms[10728:10730], + forms[10730:10732], + forms[10732:10759], + forms[10759:10786], + forms[10786:10792], + forms[10792:10798], + forms[10798:10810], + forms[10810:10822], + forms[10822:10831], + forms[10831:10840], + forms[10840:10844], + forms[10844:10846], + forms[10846:10876], + forms[10876:10906], + forms[10906:10915], + forms[10915:10924], + forms[10924:10927], + forms[10927:10930], + forms[10930:10933], + forms[10933:10936], + forms[10936:10954], + forms[10954:10972], + forms[10972:10990], + forms[10990:11008], + forms[11008:11035], + forms[11035:11062], + forms[11062:11092], + forms[11092:11122], + forms[11122:11131], + forms[11131:11140], + forms[11140:11141], + forms[11141:11171], + forms[11171:11201], + forms[11201:11210], + forms[11210:11219], + forms[11219:11223], + forms[11223:11227], + forms[11227:11230], + forms[11230:11233], + forms[11233:11260], + forms[11260:11287], + forms[11287:11314], + forms[11314:11341], + forms[11341:11368], + forms[11368:11395], + forms[11395:11396], + forms[11396:11397], + forms[11397:11399], + forms[11399:11401], + forms[11401:11403], + forms[11403:11405], + forms[11405:11408], + forms[11408:11413], + forms[11413:11418], + forms[11418:11423], + forms[11423:11424], + forms[11424:11425], + forms[11425:11431], + forms[11431:11439], + forms[11439:11441], + forms[11441:11443], + forms[11443:11451], + forms[11451:11459], }