internal/opcodesextra: _yvblendmpd forms helper (#365)
Use helper function for instructions sharing the `_yvblendmpd` family of forms.
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commit
9e56971ed6
@@ -71154,7 +71154,7 @@ var Instructions = []Instruction{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71164,7 +71164,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71184,7 +71184,7 @@ var Instructions = []Instruction{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71194,7 +71194,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71215,7 +71215,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71226,7 +71226,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71248,7 +71248,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71259,7 +71259,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71280,7 +71280,7 @@ var Instructions = []Instruction{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71290,7 +71290,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71310,7 +71310,7 @@ var Instructions = []Instruction{
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71320,7 +71320,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71341,7 +71341,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71352,7 +71352,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71373,7 +71373,7 @@ var Instructions = []Instruction{
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{Type: "m512", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71383,7 +71383,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m512", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71403,7 +71403,7 @@ var Instructions = []Instruction{
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71413,7 +71413,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71439,7 +71439,7 @@ var Instructions = []Instruction{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71449,7 +71449,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71469,7 +71469,7 @@ var Instructions = []Instruction{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71479,7 +71479,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71500,7 +71500,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71511,7 +71511,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71533,7 +71533,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71544,7 +71544,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71565,7 +71565,7 @@ var Instructions = []Instruction{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71575,7 +71575,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71595,7 +71595,7 @@ var Instructions = []Instruction{
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71605,7 +71605,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71626,7 +71626,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71637,7 +71637,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71658,7 +71658,7 @@ var Instructions = []Instruction{
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{Type: "m512", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71668,7 +71668,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m512", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71688,7 +71688,7 @@ var Instructions = []Instruction{
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71698,7 +71698,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x1},
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{Type: "zmm", Action: 0x3},
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{Type: "zmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71724,7 +71724,7 @@ var Instructions = []Instruction{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71734,7 +71734,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m128", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71754,7 +71754,7 @@ var Instructions = []Instruction{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71764,7 +71764,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m256", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71785,7 +71785,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71796,7 +71796,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71818,7 +71818,7 @@ var Instructions = []Instruction{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71829,7 +71829,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "m32", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
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EncodingType: 0x4,
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Broadcast: true,
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@@ -71850,7 +71850,7 @@ var Instructions = []Instruction{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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Zeroing: true,
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@@ -71860,7 +71860,7 @@ var Instructions = []Instruction{
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Operands: []Operand{
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x1},
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{Type: "xmm", Action: 0x3},
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{Type: "xmm", Action: 0x2},
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},
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EncodingType: 0x4,
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},
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@@ -71880,7 +71880,7 @@ var Instructions = []Instruction{
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{Type: "ymm", Action: 0x1},
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{Type: "ymm", Action: 0x1},
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{Type: "k", Action: 0x1},
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{Type: "ymm", Action: 0x3},
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{Type: "ymm", Action: 0x2},
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},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -71890,7 +71890,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -71911,7 +71911,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -71922,7 +71922,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Broadcast: true,
|
||||
@@ -71943,7 +71943,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m512", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -71953,7 +71953,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m512", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -71973,7 +71973,7 @@ var Instructions = []Instruction{
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -71983,7 +71983,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72009,7 +72009,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m128", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72019,7 +72019,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m128", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72039,7 +72039,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m256", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72049,7 +72049,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m256", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72070,7 +72070,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72081,7 +72081,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Broadcast: true,
|
||||
@@ -72103,7 +72103,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72114,7 +72114,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Broadcast: true,
|
||||
@@ -72135,7 +72135,7 @@ var Instructions = []Instruction{
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72145,7 +72145,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x1},
|
||||
{Type: "xmm", Action: 0x3},
|
||||
{Type: "xmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72165,7 +72165,7 @@ var Instructions = []Instruction{
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72175,7 +72175,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x1},
|
||||
{Type: "ymm", Action: 0x3},
|
||||
{Type: "ymm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72196,7 +72196,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72207,7 +72207,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m32", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Broadcast: true,
|
||||
@@ -72228,7 +72228,7 @@ var Instructions = []Instruction{
|
||||
{Type: "m512", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72238,7 +72238,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "m512", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
@@ -72258,7 +72258,7 @@ var Instructions = []Instruction{
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "k", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
Zeroing: true,
|
||||
@@ -72268,7 +72268,7 @@ var Instructions = []Instruction{
|
||||
Operands: []Operand{
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x1},
|
||||
{Type: "zmm", Action: 0x3},
|
||||
{Type: "zmm", Action: 0x2},
|
||||
},
|
||||
EncodingType: 0x4,
|
||||
},
|
||||
|
||||
@@ -70,3 +70,84 @@ func _yvexpandpd(isa, bcst string) inst.Forms {
|
||||
},
|
||||
}
|
||||
}
|
||||
|
||||
// _yvblendmpd family of forms shared by various instruction sets, for example
|
||||
// the VBMI2 VPSH{L,R}DV{W,D,Q} instructions and VNNI.
|
||||
//
|
||||
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L148-L155
|
||||
//
|
||||
// var _yvblendmpd = []ytab{
|
||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex, YxrEvex}},
|
||||
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YxmEvex, YxrEvex, Yknot0, YxrEvex}},
|
||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex, YyrEvex}},
|
||||
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YymEvex, YyrEvex, Yknot0, YyrEvex}},
|
||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}},
|
||||
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}},
|
||||
// }
|
||||
func _yvblendmpd(isa, bcst string) inst.Forms {
|
||||
return inst.Forms{
|
||||
// EVEX.128.66.0F38.W1 70 /r VPSHLDVW xmm1{k1}{z}, xmm2, xmm3/m128 A V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.128.66.0F38.W0 71 /r VPSHLDVD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.128.66.0F38.W1 71 /r VPSHLDVQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
{
|
||||
ISA: []string{isa, "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{isa, "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m128" + bcst, Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
// EVEX.256.66.0F38.W1 70 /r VPSHLDVW ymm1{k1}{z}, ymm2, ymm3/m256 A V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.256.66.0F38.W0 71 /r VPSHLDVD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.256.66.0F38.W1 71 /r VPSHLDVQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
{
|
||||
ISA: []string{isa, "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{isa, "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m256" + bcst, Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
// EVEX.512.66.0F38.W1 70 /r VPSHLDVW zmm1{k1}{z}, zmm2, zmm3/m512 A V/V AVX512_VBMI2
|
||||
// EVEX.512.66.0F38.W0 71 /r VPSHLDVD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst B V/V AVX512_VBMI2
|
||||
// EVEX.512.66.0F38.W1 71 /r VPSHLDVQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst B V/V AVX512_VBMI2
|
||||
{
|
||||
ISA: []string{isa},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{isa},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m512" + bcst, Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
}
|
||||
}
|
||||
|
||||
@@ -364,70 +364,4 @@ func vpshld(bcst string) inst.Forms {
|
||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}},
|
||||
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}},
|
||||
// }
|
||||
func vpshldv(bcst string) inst.Forms {
|
||||
return inst.Forms{
|
||||
// EVEX.128.66.0F38.W1 70 /r VPSHLDVW xmm1{k1}{z}, xmm2, xmm3/m128 A V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.128.66.0F38.W0 71 /r VPSHLDVD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.128.66.0F38.W1 71 /r VPSHLDVQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m128" + bcst, Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
// EVEX.256.66.0F38.W1 70 /r VPSHLDVW ymm1{k1}{z}, ymm2, ymm3/m256 A V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.256.66.0F38.W0 71 /r VPSHLDVD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
// EVEX.256.66.0F38.W1 71 /r VPSHLDVQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m256" + bcst, Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
// EVEX.512.66.0F38.W1 70 /r VPSHLDVW zmm1{k1}{z}, zmm2, zmm3/m512 A V/V AVX512_VBMI2
|
||||
// EVEX.512.66.0F38.W0 71 /r VPSHLDVD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst B V/V AVX512_VBMI2
|
||||
// EVEX.512.66.0F38.W1 71 /r VPSHLDVQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst B V/V AVX512_VBMI2
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
{
|
||||
ISA: []string{"AVX512VBMI2"},
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m512" + bcst, Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.W},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
},
|
||||
}
|
||||
}
|
||||
func vpshldv(bcst string) inst.Forms { return _yvblendmpd("AVX512VBMI2", bcst) }
|
||||
|
||||
@@ -67,71 +67,4 @@ var vnni = []*inst.Instruction{
|
||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}},
|
||||
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}},
|
||||
// }
|
||||
var vnniforms = inst.Forms{
|
||||
// EVEX.128.66.0F38.W0 50 /r VPDPBUSD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.128.66.0F38.W0 51 /r VPDPBUSDS xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.128.66.0F38.W0 52 /r VPDPWSSD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.128.66.0F38.W0 53 /r VPDPWSSDS xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst AVX512VNNI AVX512VL
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VL", "AVX512VNNI"},
|
||||
},
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m128/m32bcst", Action: inst.R},
|
||||
{Type: "xmm", Action: inst.R},
|
||||
{Type: "xmm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VL", "AVX512VNNI"},
|
||||
},
|
||||
// EVEX.256.66.0F38.W0 50 /r VPDPBUSD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.256.66.0F38.W0 51 /r VPDPBUSDS ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.256.66.0F38.W0 52 /r VPDPWSSD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst AVX512VNNI AVX512VL
|
||||
// EVEX.256.66.0F38.W0 53 /r VPDPWSSDS ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst AVX512VNNI AVX512VL
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VL", "AVX512VNNI"},
|
||||
},
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m256/m32bcst", Action: inst.R},
|
||||
{Type: "ymm", Action: inst.R},
|
||||
{Type: "ymm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VL", "AVX512VNNI"},
|
||||
},
|
||||
// EVEX.512.66.0F38.W0 50 /r VPDPBUSD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst AVX512VNNI
|
||||
// EVEX.512.66.0F38.W0 51 /r VPDPBUSDS zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst AVX512VNNI
|
||||
// EVEX.512.66.0F38.W0 52 /r VPDPWSSD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst AVX512VNNI
|
||||
// EVEX.512.66.0F38.W0 53 /r VPDPWSSDS zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst AVX512VNNI
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VNNI"},
|
||||
},
|
||||
{
|
||||
Operands: []inst.Operand{
|
||||
{Type: "m512/m32bcst", Action: inst.R},
|
||||
{Type: "zmm", Action: inst.R},
|
||||
{Type: "zmm{k}{z}", Action: inst.RW},
|
||||
},
|
||||
EncodingType: inst.EncodingTypeEVEX,
|
||||
ISA: []string{"AVX512VNNI"},
|
||||
},
|
||||
}
|
||||
var vnniforms = _yvblendmpd("AVX512VNNI", "/m32bcst")
|
||||
|
||||
144
x86/zoptab.go
144
x86/zoptab.go
@@ -9960,113 +9960,113 @@ var forms = []form{
|
||||
{opcVPCONFLICTQ, sffxsclsZ, 0, isasAVX512CD, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPCONFLICTQ, sffxsclsNIL, 0, isasAVX512CD, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPBUSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPBUSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSD, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSD, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VL_AVX512VNNI, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VL_AVX512VNNI, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST_Z, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsBCST, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
|
||||
{opcVPDPWSSDS, sffxsclsZ, 0, isasAVX512VNNI, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPDPWSSDS, sffxsclsNIL, 0, isasAVX512VNNI, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
|
||||
{opcVPERM2F128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPERM2F128, sffxsclsNIL, 0, isasAVX, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
{opcVPERM2I128, sffxsclsNIL, 0, isasAVX2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
|
||||
|
||||
Reference in New Issue
Block a user