lint: enable golint
Enables golint and fixes function naming errors (operand checks incorrectly cased). Fixes #10
This commit is contained in:
@@ -29,58 +29,58 @@ func Is3(op Op) bool {
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return ok && i == 3
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}
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// IsImm2u returns true if op is a 2-bit unsigned immediate (less than 4).
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func IsImm2u(op Op) bool {
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// IsIMM2U returns true if op is a 2-bit unsigned immediate (less than 4).
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func IsIMM2U(op Op) bool {
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i, ok := op.(U8)
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return ok && i < 4
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}
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// IsImm8 returns true is op is an 8-bit immediate.
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func IsImm8(op Op) bool {
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// IsIMM8 returns true is op is an 8-bit immediate.
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func IsIMM8(op Op) bool {
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_, ok := op.(U8)
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return ok
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}
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// IsImm16 returns true is op is a 16-bit immediate.
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func IsImm16(op Op) bool {
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// IsIMM16 returns true is op is a 16-bit immediate.
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func IsIMM16(op Op) bool {
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_, ok := op.(U16)
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return ok
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}
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// IsImm32 returns true is op is a 32-bit immediate.
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func IsImm32(op Op) bool {
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// IsIMM32 returns true is op is a 32-bit immediate.
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func IsIMM32(op Op) bool {
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_, ok := op.(U32)
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return ok
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}
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// IsImm64 returns true is op is a 64-bit immediate.
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func IsImm64(op Op) bool {
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// IsIMM64 returns true is op is a 64-bit immediate.
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func IsIMM64(op Op) bool {
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_, ok := op.(U64)
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return ok
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}
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// IsAl returns true if op is the AL register.
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func IsAl(op Op) bool {
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// IsAL returns true if op is the AL register.
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func IsAL(op Op) bool {
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return op == reg.AL
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}
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// IsCl returns true if op is the CL register.
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func IsCl(op Op) bool {
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// IsCL returns true if op is the CL register.
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func IsCL(op Op) bool {
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return op == reg.CL
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}
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// IsAx returns true if op is the 16-bit AX register.
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func IsAx(op Op) bool {
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// IsAX returns true if op is the 16-bit AX register.
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func IsAX(op Op) bool {
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return op == reg.AX
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}
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// IsEax returns true if op is the 32-bit EAX register.
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func IsEax(op Op) bool {
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// IsEAX returns true if op is the 32-bit EAX register.
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func IsEAX(op Op) bool {
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return op == reg.EAX
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}
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// IsRax returns true if op is the 64-bit RAX register.
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func IsRax(op Op) bool {
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// IsRAX returns true if op is the 64-bit RAX register.
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func IsRAX(op Op) bool {
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return op == reg.RAX
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}
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@@ -114,18 +114,18 @@ func IsGP(op Op, n uint) bool {
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return IsRegisterKindSize(op, reg.KindGP, n)
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}
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// IsXmm0 returns true if op is the X0 register.
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func IsXmm0(op Op) bool {
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// IsXMM0 returns true if op is the X0 register.
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func IsXMM0(op Op) bool {
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return op == reg.X0
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}
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// IsXmm returns true if op is a 128-bit XMM register.
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func IsXmm(op Op) bool {
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// IsXMM returns true if op is a 128-bit XMM register.
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func IsXMM(op Op) bool {
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return IsRegisterKindSize(op, reg.KindVector, 16)
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}
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// IsYmm returns true if op is a 256-bit YMM register.
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func IsYmm(op Op) bool {
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// IsYMM returns true if op is a 256-bit YMM register.
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func IsYMM(op Op) bool {
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return IsRegisterKindSize(op, reg.KindVector, 32)
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}
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@@ -198,34 +198,34 @@ func IsM256(op Op) bool {
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return IsM64(op)
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}
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// IsVm32x returns true if op is a vector memory operand with 32-bit XMM index.
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func IsVm32x(op Op) bool {
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// IsVM32X returns true if op is a vector memory operand with 32-bit XMM index.
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func IsVM32X(op Op) bool {
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return IsVmx(op)
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}
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// IsVm64x returns true if op is a vector memory operand with 64-bit XMM index.
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func IsVm64x(op Op) bool {
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// IsVM64X returns true if op is a vector memory operand with 64-bit XMM index.
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func IsVM64X(op Op) bool {
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return IsVmx(op)
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}
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// IsVmx returns true if op is a vector memory operand with XMM index.
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func IsVmx(op Op) bool {
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return isvm(op, IsXmm)
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return isvm(op, IsXMM)
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}
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// IsVm32y returns true if op is a vector memory operand with 32-bit YMM index.
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func IsVm32y(op Op) bool {
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// IsVM32Y returns true if op is a vector memory operand with 32-bit YMM index.
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func IsVM32Y(op Op) bool {
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return IsVmy(op)
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}
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// IsVm64y returns true if op is a vector memory operand with 64-bit YMM index.
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func IsVm64y(op Op) bool {
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// IsVM64Y returns true if op is a vector memory operand with 64-bit YMM index.
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func IsVM64Y(op Op) bool {
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return IsVmy(op)
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}
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// IsVmy returns true if op is a vector memory operand with YMM index.
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func IsVmy(op Op) bool {
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return isvm(op, IsYmm)
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return isvm(op, IsYMM)
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}
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func isvm(op Op, idx func(Op) bool) bool {
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@@ -233,15 +233,15 @@ func isvm(op Op, idx func(Op) bool) bool {
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return ok && IsR64(m.Base) && idx(m.Index)
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}
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// IsRel8 returns true if op is an 8-bit offset relative to instruction pointer.
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func IsRel8(op Op) bool {
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// IsREL8 returns true if op is an 8-bit offset relative to instruction pointer.
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func IsREL8(op Op) bool {
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r, ok := op.(Rel)
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return ok && r == Rel(int8(r))
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}
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// IsRel32 returns true if op is an offset relative to instruction pointer, or a
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// IsREL32 returns true if op is an offset relative to instruction pointer, or a
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// label reference.
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func IsRel32(op Op) bool {
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func IsREL32(op Op) bool {
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// TODO(mbm): should labels be considered separately?
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_, rel := op.(Rel)
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_, label := op.(LabelRef)
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@@ -22,35 +22,35 @@ func TestChecks(t *testing.T) {
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{Is3, Imm(3), true},
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{Is3, Imm(23), false},
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{IsImm2u, Imm(3), true},
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{IsImm2u, Imm(4), false},
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{IsIMM2U, Imm(3), true},
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{IsIMM2U, Imm(4), false},
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{IsImm8, Imm(255), true},
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{IsImm8, Imm(256), false},
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{IsIMM8, Imm(255), true},
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{IsIMM8, Imm(256), false},
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{IsImm16, Imm((1 << 16) - 1), true},
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{IsImm16, Imm(1 << 16), false},
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{IsIMM16, Imm((1 << 16) - 1), true},
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{IsIMM16, Imm(1 << 16), false},
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{IsImm32, Imm((1 << 32) - 1), true},
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{IsImm32, Imm(1 << 32), false},
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{IsIMM32, Imm((1 << 32) - 1), true},
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{IsIMM32, Imm(1 << 32), false},
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{IsImm64, Imm((1 << 64) - 1), true},
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{IsIMM64, Imm((1 << 64) - 1), true},
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// Specific registers
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{IsAl, reg.AL, true},
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{IsAl, reg.CL, false},
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{IsAL, reg.AL, true},
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{IsAL, reg.CL, false},
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{IsCl, reg.CL, true},
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{IsCl, reg.DH, false},
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{IsCL, reg.CL, true},
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{IsCL, reg.DH, false},
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{IsAx, reg.AX, true},
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{IsAx, reg.DX, false},
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{IsAX, reg.AX, true},
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{IsAX, reg.DX, false},
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{IsEax, reg.EAX, true},
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{IsEax, reg.ECX, false},
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{IsEAX, reg.EAX, true},
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{IsEAX, reg.ECX, false},
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{IsRax, reg.RAX, true},
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{IsRax, reg.R13, false},
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{IsRAX, reg.RAX, true},
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{IsRAX, reg.R13, false},
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// General-purpose registers
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{IsR8, reg.AL, true},
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@@ -70,20 +70,20 @@ func TestChecks(t *testing.T) {
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{IsR64, reg.EBX, false},
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// Vector registers
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{IsXmm0, reg.X0, true},
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{IsXmm0, reg.X13, false},
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{IsXmm0, reg.Y3, false},
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{IsXMM0, reg.X0, true},
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{IsXMM0, reg.X13, false},
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{IsXMM0, reg.Y3, false},
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{IsXmm, reg.X0, true},
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{IsXmm, reg.X13, true},
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{IsXmm, reg.Y3, false},
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{IsXmm, reg.Z23, false},
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{IsXMM, reg.X0, true},
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{IsXMM, reg.X13, true},
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{IsXMM, reg.Y3, false},
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{IsXMM, reg.Z23, false},
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{IsYmm, reg.Y0, true},
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{IsYmm, reg.Y13, true},
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{IsYmm, reg.Y31, true},
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{IsYmm, reg.X3, false},
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{IsYmm, reg.Z3, false},
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{IsYMM, reg.Y0, true},
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{IsYMM, reg.Y13, true},
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{IsYMM, reg.Y31, true},
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{IsYMM, reg.X3, false},
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{IsYMM, reg.Z3, false},
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// Pseudo registers.
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{IsPseudo, reg.FramePointer, true},
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@@ -129,33 +129,33 @@ func TestChecks(t *testing.T) {
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{IsM64, NewParamAddr("foo", 4), true},
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// Vector memory operands
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{IsVm32x, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVm32x, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVm32x, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVM32X, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVM32X, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVM32X, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVm64x, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVm64x, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVm64x, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVM64X, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVM64X, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVM64X, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVm32y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVm32y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVm32y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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{IsVM32Y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVM32Y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVM32Y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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{IsVm64y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVm64y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVm64y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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{IsVM64Y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVM64Y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVM64Y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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// Relative operands
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{IsRel8, Rel(math.MinInt8), true},
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{IsRel8, Rel(math.MaxInt8), true},
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{IsRel8, Rel(math.MinInt8 - 1), false},
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{IsRel8, Rel(math.MaxInt8 + 1), false},
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{IsRel8, reg.R9B, false},
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{IsREL8, Rel(math.MinInt8), true},
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{IsREL8, Rel(math.MaxInt8), true},
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{IsREL8, Rel(math.MinInt8 - 1), false},
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{IsREL8, Rel(math.MaxInt8 + 1), false},
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{IsREL8, reg.R9B, false},
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{IsRel32, Rel(math.MinInt32), true},
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{IsRel32, Rel(math.MaxInt32), true},
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{IsRel32, LabelRef("label"), true},
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{IsRel32, reg.R9L, false},
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{IsREL32, Rel(math.MinInt32), true},
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{IsREL32, Rel(math.MaxInt32), true},
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{IsREL32, LabelRef("label"), true},
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{IsREL32, reg.R9L, false},
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}
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for _, c := range cases {
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