From e2c0a40f507c8f67f7ddeea3499ca1c031ad13d1 Mon Sep 17 00:00:00 2001 From: Michael McLoughlin Date: Sat, 14 Jan 2023 13:25:44 -0800 Subject: [PATCH] all: VBMI2 instructions (#363) Adds the "Vector Bit Manipulation Instructions 2" instruction set. These new instructions are added via the `opcodesextra` mechanism #345, since they're missing from the opcodes database. Contributed by @vsivsi. Extracted from #349 with simplifications. Specifically, as prompted by the `dupl` linter we extract some common forms lists into a helper `forms.go` file. Co-authored-by: Vaughn Iverson --- build/zinstructions.go | 1620 +++++++++++ build/zinstructions_test.go | 48 + internal/inst/ztable.go | 3780 +++++++++++++++++++++++++ internal/opcodesextra/bitalg.go | 54 +- internal/opcodesextra/forms.go | 72 + internal/opcodesextra/instructions.go | 17 +- internal/opcodesextra/vbmi2.go | 433 +++ internal/opcodesextra/vpopcntdq.go | 63 +- x86/zctors.go | 738 +++++ x86/zctors_test.go | 1206 ++++++++ x86/zoptab.go | 978 +++++-- 11 files changed, 8609 insertions(+), 400 deletions(-) create mode 100644 internal/opcodesextra/forms.go create mode 100644 internal/opcodesextra/vbmi2.go diff --git a/build/zinstructions.go b/build/zinstructions.go index 6e8261a..2d117f1 100644 --- a/build/zinstructions.go +++ b/build/zinstructions.go @@ -59522,6 +59522,74 @@ func (c *Context) VPCMPW(ops ...operand.Op) { // Operates on the global context. func VPCMPW(ops ...operand.Op) { ctx.VPCMPW(ops...) } +// VPCOMPRESSB: Store Sparse Packed Byte Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSB xmm k m128 +// VPCOMPRESSB xmm k xmm +// VPCOMPRESSB xmm m128 +// VPCOMPRESSB xmm xmm +// VPCOMPRESSB ymm k m256 +// VPCOMPRESSB ymm k ymm +// VPCOMPRESSB ymm m256 +// VPCOMPRESSB ymm ymm +// VPCOMPRESSB zmm k m512 +// VPCOMPRESSB zmm k zmm +// VPCOMPRESSB zmm m512 +// VPCOMPRESSB zmm zmm +// +// Construct and append a VPCOMPRESSB instruction to the active function. +func (c *Context) VPCOMPRESSB(ops ...operand.Op) { + c.addinstruction(x86.VPCOMPRESSB(ops...)) +} + +// VPCOMPRESSB: Store Sparse Packed Byte Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSB xmm k m128 +// VPCOMPRESSB xmm k xmm +// VPCOMPRESSB xmm m128 +// VPCOMPRESSB xmm xmm +// VPCOMPRESSB ymm k m256 +// VPCOMPRESSB ymm k ymm +// VPCOMPRESSB ymm m256 +// VPCOMPRESSB ymm ymm +// VPCOMPRESSB zmm k m512 +// VPCOMPRESSB zmm k zmm +// VPCOMPRESSB zmm m512 +// VPCOMPRESSB zmm zmm +// +// Construct and append a VPCOMPRESSB instruction to the active function. +// Operates on the global context. +func VPCOMPRESSB(ops ...operand.Op) { ctx.VPCOMPRESSB(ops...) } + +// VPCOMPRESSB_Z: Store Sparse Packed Byte Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSB.Z xmm k xmm +// VPCOMPRESSB.Z ymm k ymm +// VPCOMPRESSB.Z zmm k zmm +// +// Construct and append a VPCOMPRESSB.Z instruction to the active function. +func (c *Context) VPCOMPRESSB_Z(xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPCOMPRESSB_Z(xyz, k, xyz1)) +} + +// VPCOMPRESSB_Z: Store Sparse Packed Byte Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSB.Z xmm k xmm +// VPCOMPRESSB.Z ymm k ymm +// VPCOMPRESSB.Z zmm k zmm +// +// Construct and append a VPCOMPRESSB.Z instruction to the active function. +// Operates on the global context. +func VPCOMPRESSB_Z(xyz, k, xyz1 operand.Op) { ctx.VPCOMPRESSB_Z(xyz, k, xyz1) } + // VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register. // // Forms: @@ -59670,6 +59738,74 @@ func (c *Context) VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) { // Operates on the global context. func VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) { ctx.VPCOMPRESSQ_Z(xyz, k, mxyz) } +// VPCOMPRESSW: Store Sparse Packed Word Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSW xmm k m128 +// VPCOMPRESSW xmm k xmm +// VPCOMPRESSW xmm m128 +// VPCOMPRESSW xmm xmm +// VPCOMPRESSW ymm k m256 +// VPCOMPRESSW ymm k ymm +// VPCOMPRESSW ymm m256 +// VPCOMPRESSW ymm ymm +// VPCOMPRESSW zmm k m512 +// VPCOMPRESSW zmm k zmm +// VPCOMPRESSW zmm m512 +// VPCOMPRESSW zmm zmm +// +// Construct and append a VPCOMPRESSW instruction to the active function. +func (c *Context) VPCOMPRESSW(ops ...operand.Op) { + c.addinstruction(x86.VPCOMPRESSW(ops...)) +} + +// VPCOMPRESSW: Store Sparse Packed Word Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSW xmm k m128 +// VPCOMPRESSW xmm k xmm +// VPCOMPRESSW xmm m128 +// VPCOMPRESSW xmm xmm +// VPCOMPRESSW ymm k m256 +// VPCOMPRESSW ymm k ymm +// VPCOMPRESSW ymm m256 +// VPCOMPRESSW ymm ymm +// VPCOMPRESSW zmm k m512 +// VPCOMPRESSW zmm k zmm +// VPCOMPRESSW zmm m512 +// VPCOMPRESSW zmm zmm +// +// Construct and append a VPCOMPRESSW instruction to the active function. +// Operates on the global context. +func VPCOMPRESSW(ops ...operand.Op) { ctx.VPCOMPRESSW(ops...) } + +// VPCOMPRESSW_Z: Store Sparse Packed Word Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSW.Z xmm k xmm +// VPCOMPRESSW.Z ymm k ymm +// VPCOMPRESSW.Z zmm k zmm +// +// Construct and append a VPCOMPRESSW.Z instruction to the active function. +func (c *Context) VPCOMPRESSW_Z(xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPCOMPRESSW_Z(xyz, k, xyz1)) +} + +// VPCOMPRESSW_Z: Store Sparse Packed Word Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSW.Z xmm k xmm +// VPCOMPRESSW.Z ymm k ymm +// VPCOMPRESSW.Z zmm k zmm +// +// Construct and append a VPCOMPRESSW.Z instruction to the active function. +// Operates on the global context. +func VPCOMPRESSW_Z(xyz, k, xyz1 operand.Op) { ctx.VPCOMPRESSW_Z(xyz, k, xyz1) } + // VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register. // // Forms: @@ -62868,6 +63004,80 @@ func (c *Context) VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) { // Operates on the global context. func VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPERMW_Z(mxyz, xyz, k, xyz1) } +// VPEXPANDB: Load Sparse Packed Byte Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDB m128 k xmm +// VPEXPANDB m128 xmm +// VPEXPANDB m256 k ymm +// VPEXPANDB m256 ymm +// VPEXPANDB xmm k xmm +// VPEXPANDB xmm xmm +// VPEXPANDB ymm k ymm +// VPEXPANDB ymm ymm +// VPEXPANDB m512 k zmm +// VPEXPANDB m512 zmm +// VPEXPANDB zmm k zmm +// VPEXPANDB zmm zmm +// +// Construct and append a VPEXPANDB instruction to the active function. +func (c *Context) VPEXPANDB(ops ...operand.Op) { + c.addinstruction(x86.VPEXPANDB(ops...)) +} + +// VPEXPANDB: Load Sparse Packed Byte Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDB m128 k xmm +// VPEXPANDB m128 xmm +// VPEXPANDB m256 k ymm +// VPEXPANDB m256 ymm +// VPEXPANDB xmm k xmm +// VPEXPANDB xmm xmm +// VPEXPANDB ymm k ymm +// VPEXPANDB ymm ymm +// VPEXPANDB m512 k zmm +// VPEXPANDB m512 zmm +// VPEXPANDB zmm k zmm +// VPEXPANDB zmm zmm +// +// Construct and append a VPEXPANDB instruction to the active function. +// Operates on the global context. +func VPEXPANDB(ops ...operand.Op) { ctx.VPEXPANDB(ops...) } + +// VPEXPANDB_Z: Load Sparse Packed Byte Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDB.Z m128 k xmm +// VPEXPANDB.Z m256 k ymm +// VPEXPANDB.Z xmm k xmm +// VPEXPANDB.Z ymm k ymm +// VPEXPANDB.Z m512 k zmm +// VPEXPANDB.Z zmm k zmm +// +// Construct and append a VPEXPANDB.Z instruction to the active function. +func (c *Context) VPEXPANDB_Z(mxyz, k, xyz operand.Op) { + c.addinstruction(x86.VPEXPANDB_Z(mxyz, k, xyz)) +} + +// VPEXPANDB_Z: Load Sparse Packed Byte Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDB.Z m128 k xmm +// VPEXPANDB.Z m256 k ymm +// VPEXPANDB.Z xmm k xmm +// VPEXPANDB.Z ymm k ymm +// VPEXPANDB.Z m512 k zmm +// VPEXPANDB.Z zmm k zmm +// +// Construct and append a VPEXPANDB.Z instruction to the active function. +// Operates on the global context. +func VPEXPANDB_Z(mxyz, k, xyz operand.Op) { ctx.VPEXPANDB_Z(mxyz, k, xyz) } + // VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register. // // Forms: @@ -63016,6 +63226,80 @@ func (c *Context) VPEXPANDQ_Z(mxyz, k, xyz operand.Op) { // Operates on the global context. func VPEXPANDQ_Z(mxyz, k, xyz operand.Op) { ctx.VPEXPANDQ_Z(mxyz, k, xyz) } +// VPEXPANDW: Load Sparse Packed Word Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDW m128 k xmm +// VPEXPANDW m128 xmm +// VPEXPANDW m256 k ymm +// VPEXPANDW m256 ymm +// VPEXPANDW xmm k xmm +// VPEXPANDW xmm xmm +// VPEXPANDW ymm k ymm +// VPEXPANDW ymm ymm +// VPEXPANDW m512 k zmm +// VPEXPANDW m512 zmm +// VPEXPANDW zmm k zmm +// VPEXPANDW zmm zmm +// +// Construct and append a VPEXPANDW instruction to the active function. +func (c *Context) VPEXPANDW(ops ...operand.Op) { + c.addinstruction(x86.VPEXPANDW(ops...)) +} + +// VPEXPANDW: Load Sparse Packed Word Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDW m128 k xmm +// VPEXPANDW m128 xmm +// VPEXPANDW m256 k ymm +// VPEXPANDW m256 ymm +// VPEXPANDW xmm k xmm +// VPEXPANDW xmm xmm +// VPEXPANDW ymm k ymm +// VPEXPANDW ymm ymm +// VPEXPANDW m512 k zmm +// VPEXPANDW m512 zmm +// VPEXPANDW zmm k zmm +// VPEXPANDW zmm zmm +// +// Construct and append a VPEXPANDW instruction to the active function. +// Operates on the global context. +func VPEXPANDW(ops ...operand.Op) { ctx.VPEXPANDW(ops...) } + +// VPEXPANDW_Z: Load Sparse Packed Word Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDW.Z m128 k xmm +// VPEXPANDW.Z m256 k ymm +// VPEXPANDW.Z xmm k xmm +// VPEXPANDW.Z ymm k ymm +// VPEXPANDW.Z m512 k zmm +// VPEXPANDW.Z zmm k zmm +// +// Construct and append a VPEXPANDW.Z instruction to the active function. +func (c *Context) VPEXPANDW_Z(mxyz, k, xyz operand.Op) { + c.addinstruction(x86.VPEXPANDW_Z(mxyz, k, xyz)) +} + +// VPEXPANDW_Z: Load Sparse Packed Word Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDW.Z m128 k xmm +// VPEXPANDW.Z m256 k ymm +// VPEXPANDW.Z xmm k xmm +// VPEXPANDW.Z ymm k ymm +// VPEXPANDW.Z m512 k zmm +// VPEXPANDW.Z zmm k zmm +// +// Construct and append a VPEXPANDW.Z instruction to the active function. +// Operates on the global context. +func VPEXPANDW_Z(mxyz, k, xyz operand.Op) { ctx.VPEXPANDW_Z(mxyz, k, xyz) } + // VPEXTRB: Extract Byte. // // Forms: @@ -71110,6 +71394,1342 @@ func (c *Context) VPSCATTERQQ(xyz, k, v operand.Op) { // Operates on the global context. func VPSCATTERQQ(xyz, k, v operand.Op) { ctx.VPSCATTERQQ(xyz, k, v) } +// VPSHLDD: Concatenate Dwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDD imm8 m128 xmm k xmm +// VPSHLDD imm8 m128 xmm xmm +// VPSHLDD imm8 m256 ymm k ymm +// VPSHLDD imm8 m256 ymm ymm +// VPSHLDD imm8 xmm xmm k xmm +// VPSHLDD imm8 xmm xmm xmm +// VPSHLDD imm8 ymm ymm k ymm +// VPSHLDD imm8 ymm ymm ymm +// VPSHLDD imm8 m512 zmm k zmm +// VPSHLDD imm8 m512 zmm zmm +// VPSHLDD imm8 zmm zmm k zmm +// VPSHLDD imm8 zmm zmm zmm +// +// Construct and append a VPSHLDD instruction to the active function. +func (c *Context) VPSHLDD(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDD(ops...)) +} + +// VPSHLDD: Concatenate Dwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDD imm8 m128 xmm k xmm +// VPSHLDD imm8 m128 xmm xmm +// VPSHLDD imm8 m256 ymm k ymm +// VPSHLDD imm8 m256 ymm ymm +// VPSHLDD imm8 xmm xmm k xmm +// VPSHLDD imm8 xmm xmm xmm +// VPSHLDD imm8 ymm ymm k ymm +// VPSHLDD imm8 ymm ymm ymm +// VPSHLDD imm8 m512 zmm k zmm +// VPSHLDD imm8 m512 zmm zmm +// VPSHLDD imm8 zmm zmm k zmm +// VPSHLDD imm8 zmm zmm zmm +// +// Construct and append a VPSHLDD instruction to the active function. +// Operates on the global context. +func VPSHLDD(ops ...operand.Op) { ctx.VPSHLDD(ops...) } + +// VPSHLDD_BCST: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDD.BCST imm8 m32 xmm k xmm +// VPSHLDD.BCST imm8 m32 xmm xmm +// VPSHLDD.BCST imm8 m32 ymm k ymm +// VPSHLDD.BCST imm8 m32 ymm ymm +// VPSHLDD.BCST imm8 m32 zmm k zmm +// VPSHLDD.BCST imm8 m32 zmm zmm +// +// Construct and append a VPSHLDD.BCST instruction to the active function. +func (c *Context) VPSHLDD_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDD_BCST(ops...)) +} + +// VPSHLDD_BCST: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDD.BCST imm8 m32 xmm k xmm +// VPSHLDD.BCST imm8 m32 xmm xmm +// VPSHLDD.BCST imm8 m32 ymm k ymm +// VPSHLDD.BCST imm8 m32 ymm ymm +// VPSHLDD.BCST imm8 m32 zmm k zmm +// VPSHLDD.BCST imm8 m32 zmm zmm +// +// Construct and append a VPSHLDD.BCST instruction to the active function. +// Operates on the global context. +func VPSHLDD_BCST(ops ...operand.Op) { ctx.VPSHLDD_BCST(ops...) } + +// VPSHLDD_BCST_Z: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDD.BCST.Z imm8 m32 xmm k xmm +// VPSHLDD.BCST.Z imm8 m32 ymm k ymm +// VPSHLDD.BCST.Z imm8 m32 zmm k zmm +// +// Construct and append a VPSHLDD.BCST.Z instruction to the active function. +func (c *Context) VPSHLDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDD_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VPSHLDD_BCST_Z: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDD.BCST.Z imm8 m32 xmm k xmm +// VPSHLDD.BCST.Z imm8 m32 ymm k ymm +// VPSHLDD.BCST.Z imm8 m32 zmm k zmm +// +// Construct and append a VPSHLDD.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHLDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPSHLDD_BCST_Z(i, m, xyz, k, xyz1) } + +// VPSHLDD_Z: Concatenate Dwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDD.Z imm8 m128 xmm k xmm +// VPSHLDD.Z imm8 m256 ymm k ymm +// VPSHLDD.Z imm8 xmm xmm k xmm +// VPSHLDD.Z imm8 ymm ymm k ymm +// VPSHLDD.Z imm8 m512 zmm k zmm +// VPSHLDD.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDD.Z instruction to the active function. +func (c *Context) VPSHLDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDD_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHLDD_Z: Concatenate Dwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDD.Z imm8 m128 xmm k xmm +// VPSHLDD.Z imm8 m256 ymm k ymm +// VPSHLDD.Z imm8 xmm xmm k xmm +// VPSHLDD.Z imm8 ymm ymm k ymm +// VPSHLDD.Z imm8 m512 zmm k zmm +// VPSHLDD.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDD.Z instruction to the active function. +// Operates on the global context. +func VPSHLDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDD_Z(i, mxyz, xyz, k, xyz1) } + +// VPSHLDQ: Concatenate Quadwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDQ imm8 m128 xmm k xmm +// VPSHLDQ imm8 m128 xmm xmm +// VPSHLDQ imm8 m256 ymm k ymm +// VPSHLDQ imm8 m256 ymm ymm +// VPSHLDQ imm8 xmm xmm k xmm +// VPSHLDQ imm8 xmm xmm xmm +// VPSHLDQ imm8 ymm ymm k ymm +// VPSHLDQ imm8 ymm ymm ymm +// VPSHLDQ imm8 m512 zmm k zmm +// VPSHLDQ imm8 m512 zmm zmm +// VPSHLDQ imm8 zmm zmm k zmm +// VPSHLDQ imm8 zmm zmm zmm +// +// Construct and append a VPSHLDQ instruction to the active function. +func (c *Context) VPSHLDQ(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDQ(ops...)) +} + +// VPSHLDQ: Concatenate Quadwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDQ imm8 m128 xmm k xmm +// VPSHLDQ imm8 m128 xmm xmm +// VPSHLDQ imm8 m256 ymm k ymm +// VPSHLDQ imm8 m256 ymm ymm +// VPSHLDQ imm8 xmm xmm k xmm +// VPSHLDQ imm8 xmm xmm xmm +// VPSHLDQ imm8 ymm ymm k ymm +// VPSHLDQ imm8 ymm ymm ymm +// VPSHLDQ imm8 m512 zmm k zmm +// VPSHLDQ imm8 m512 zmm zmm +// VPSHLDQ imm8 zmm zmm k zmm +// VPSHLDQ imm8 zmm zmm zmm +// +// Construct and append a VPSHLDQ instruction to the active function. +// Operates on the global context. +func VPSHLDQ(ops ...operand.Op) { ctx.VPSHLDQ(ops...) } + +// VPSHLDQ_BCST: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDQ.BCST imm8 m64 xmm k xmm +// VPSHLDQ.BCST imm8 m64 xmm xmm +// VPSHLDQ.BCST imm8 m64 ymm k ymm +// VPSHLDQ.BCST imm8 m64 ymm ymm +// VPSHLDQ.BCST imm8 m64 zmm k zmm +// VPSHLDQ.BCST imm8 m64 zmm zmm +// +// Construct and append a VPSHLDQ.BCST instruction to the active function. +func (c *Context) VPSHLDQ_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDQ_BCST(ops...)) +} + +// VPSHLDQ_BCST: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDQ.BCST imm8 m64 xmm k xmm +// VPSHLDQ.BCST imm8 m64 xmm xmm +// VPSHLDQ.BCST imm8 m64 ymm k ymm +// VPSHLDQ.BCST imm8 m64 ymm ymm +// VPSHLDQ.BCST imm8 m64 zmm k zmm +// VPSHLDQ.BCST imm8 m64 zmm zmm +// +// Construct and append a VPSHLDQ.BCST instruction to the active function. +// Operates on the global context. +func VPSHLDQ_BCST(ops ...operand.Op) { ctx.VPSHLDQ_BCST(ops...) } + +// VPSHLDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHLDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHLDQ.BCST.Z imm8 m64 zmm k zmm +// +// Construct and append a VPSHLDQ.BCST.Z instruction to the active function. +func (c *Context) VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VPSHLDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHLDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHLDQ.BCST.Z imm8 m64 zmm k zmm +// +// Construct and append a VPSHLDQ.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1) } + +// VPSHLDQ_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.Z imm8 m128 xmm k xmm +// VPSHLDQ.Z imm8 m256 ymm k ymm +// VPSHLDQ.Z imm8 xmm xmm k xmm +// VPSHLDQ.Z imm8 ymm ymm k ymm +// VPSHLDQ.Z imm8 m512 zmm k zmm +// VPSHLDQ.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDQ.Z instruction to the active function. +func (c *Context) VPSHLDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDQ_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHLDQ_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.Z imm8 m128 xmm k xmm +// VPSHLDQ.Z imm8 m256 ymm k ymm +// VPSHLDQ.Z imm8 xmm xmm k xmm +// VPSHLDQ.Z imm8 ymm ymm k ymm +// VPSHLDQ.Z imm8 m512 zmm k zmm +// VPSHLDQ.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDQ.Z instruction to the active function. +// Operates on the global context. +func VPSHLDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDQ_Z(i, mxyz, xyz, k, xyz1) } + +// VPSHLDVD: Concatenate Dwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVD m128 xmm k xmm +// VPSHLDVD m128 xmm xmm +// VPSHLDVD m256 ymm k ymm +// VPSHLDVD m256 ymm ymm +// VPSHLDVD xmm xmm k xmm +// VPSHLDVD xmm xmm xmm +// VPSHLDVD ymm ymm k ymm +// VPSHLDVD ymm ymm ymm +// VPSHLDVD m512 zmm k zmm +// VPSHLDVD m512 zmm zmm +// VPSHLDVD zmm zmm k zmm +// VPSHLDVD zmm zmm zmm +// +// Construct and append a VPSHLDVD instruction to the active function. +func (c *Context) VPSHLDVD(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDVD(ops...)) +} + +// VPSHLDVD: Concatenate Dwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVD m128 xmm k xmm +// VPSHLDVD m128 xmm xmm +// VPSHLDVD m256 ymm k ymm +// VPSHLDVD m256 ymm ymm +// VPSHLDVD xmm xmm k xmm +// VPSHLDVD xmm xmm xmm +// VPSHLDVD ymm ymm k ymm +// VPSHLDVD ymm ymm ymm +// VPSHLDVD m512 zmm k zmm +// VPSHLDVD m512 zmm zmm +// VPSHLDVD zmm zmm k zmm +// VPSHLDVD zmm zmm zmm +// +// Construct and append a VPSHLDVD instruction to the active function. +// Operates on the global context. +func VPSHLDVD(ops ...operand.Op) { ctx.VPSHLDVD(ops...) } + +// VPSHLDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVD.BCST m32 xmm k xmm +// VPSHLDVD.BCST m32 xmm xmm +// VPSHLDVD.BCST m32 ymm k ymm +// VPSHLDVD.BCST m32 ymm ymm +// VPSHLDVD.BCST m32 zmm k zmm +// VPSHLDVD.BCST m32 zmm zmm +// +// Construct and append a VPSHLDVD.BCST instruction to the active function. +func (c *Context) VPSHLDVD_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDVD_BCST(ops...)) +} + +// VPSHLDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVD.BCST m32 xmm k xmm +// VPSHLDVD.BCST m32 xmm xmm +// VPSHLDVD.BCST m32 ymm k ymm +// VPSHLDVD.BCST m32 ymm ymm +// VPSHLDVD.BCST m32 zmm k zmm +// VPSHLDVD.BCST m32 zmm zmm +// +// Construct and append a VPSHLDVD.BCST instruction to the active function. +// Operates on the global context. +func VPSHLDVD_BCST(ops ...operand.Op) { ctx.VPSHLDVD_BCST(ops...) } + +// VPSHLDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.BCST.Z m32 xmm k xmm +// VPSHLDVD.BCST.Z m32 ymm k ymm +// VPSHLDVD.BCST.Z m32 zmm k zmm +// +// Construct and append a VPSHLDVD.BCST.Z instruction to the active function. +func (c *Context) VPSHLDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDVD_BCST_Z(m, xyz, k, xyz1)) +} + +// VPSHLDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.BCST.Z m32 xmm k xmm +// VPSHLDVD.BCST.Z m32 ymm k ymm +// VPSHLDVD.BCST.Z m32 zmm k zmm +// +// Construct and append a VPSHLDVD.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHLDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSHLDVD_BCST_Z(m, xyz, k, xyz1) } + +// VPSHLDVD_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.Z m128 xmm k xmm +// VPSHLDVD.Z m256 ymm k ymm +// VPSHLDVD.Z xmm xmm k xmm +// VPSHLDVD.Z ymm ymm k ymm +// VPSHLDVD.Z m512 zmm k zmm +// VPSHLDVD.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVD.Z instruction to the active function. +func (c *Context) VPSHLDVD_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDVD_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHLDVD_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.Z m128 xmm k xmm +// VPSHLDVD.Z m256 ymm k ymm +// VPSHLDVD.Z xmm xmm k xmm +// VPSHLDVD.Z ymm ymm k ymm +// VPSHLDVD.Z m512 zmm k zmm +// VPSHLDVD.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVD.Z instruction to the active function. +// Operates on the global context. +func VPSHLDVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDVD_Z(mxyz, xyz, k, xyz1) } + +// VPSHLDVQ: Concatenate Quadwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVQ m128 xmm k xmm +// VPSHLDVQ m128 xmm xmm +// VPSHLDVQ m256 ymm k ymm +// VPSHLDVQ m256 ymm ymm +// VPSHLDVQ xmm xmm k xmm +// VPSHLDVQ xmm xmm xmm +// VPSHLDVQ ymm ymm k ymm +// VPSHLDVQ ymm ymm ymm +// VPSHLDVQ m512 zmm k zmm +// VPSHLDVQ m512 zmm zmm +// VPSHLDVQ zmm zmm k zmm +// VPSHLDVQ zmm zmm zmm +// +// Construct and append a VPSHLDVQ instruction to the active function. +func (c *Context) VPSHLDVQ(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDVQ(ops...)) +} + +// VPSHLDVQ: Concatenate Quadwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVQ m128 xmm k xmm +// VPSHLDVQ m128 xmm xmm +// VPSHLDVQ m256 ymm k ymm +// VPSHLDVQ m256 ymm ymm +// VPSHLDVQ xmm xmm k xmm +// VPSHLDVQ xmm xmm xmm +// VPSHLDVQ ymm ymm k ymm +// VPSHLDVQ ymm ymm ymm +// VPSHLDVQ m512 zmm k zmm +// VPSHLDVQ m512 zmm zmm +// VPSHLDVQ zmm zmm k zmm +// VPSHLDVQ zmm zmm zmm +// +// Construct and append a VPSHLDVQ instruction to the active function. +// Operates on the global context. +func VPSHLDVQ(ops ...operand.Op) { ctx.VPSHLDVQ(ops...) } + +// VPSHLDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVQ.BCST m64 xmm k xmm +// VPSHLDVQ.BCST m64 xmm xmm +// VPSHLDVQ.BCST m64 ymm k ymm +// VPSHLDVQ.BCST m64 ymm ymm +// VPSHLDVQ.BCST m64 zmm k zmm +// VPSHLDVQ.BCST m64 zmm zmm +// +// Construct and append a VPSHLDVQ.BCST instruction to the active function. +func (c *Context) VPSHLDVQ_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDVQ_BCST(ops...)) +} + +// VPSHLDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVQ.BCST m64 xmm k xmm +// VPSHLDVQ.BCST m64 xmm xmm +// VPSHLDVQ.BCST m64 ymm k ymm +// VPSHLDVQ.BCST m64 ymm ymm +// VPSHLDVQ.BCST m64 zmm k zmm +// VPSHLDVQ.BCST m64 zmm zmm +// +// Construct and append a VPSHLDVQ.BCST instruction to the active function. +// Operates on the global context. +func VPSHLDVQ_BCST(ops ...operand.Op) { ctx.VPSHLDVQ_BCST(ops...) } + +// VPSHLDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.BCST.Z m64 xmm k xmm +// VPSHLDVQ.BCST.Z m64 ymm k ymm +// VPSHLDVQ.BCST.Z m64 zmm k zmm +// +// Construct and append a VPSHLDVQ.BCST.Z instruction to the active function. +func (c *Context) VPSHLDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDVQ_BCST_Z(m, xyz, k, xyz1)) +} + +// VPSHLDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.BCST.Z m64 xmm k xmm +// VPSHLDVQ.BCST.Z m64 ymm k ymm +// VPSHLDVQ.BCST.Z m64 zmm k zmm +// +// Construct and append a VPSHLDVQ.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHLDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSHLDVQ_BCST_Z(m, xyz, k, xyz1) } + +// VPSHLDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.Z m128 xmm k xmm +// VPSHLDVQ.Z m256 ymm k ymm +// VPSHLDVQ.Z xmm xmm k xmm +// VPSHLDVQ.Z ymm ymm k ymm +// VPSHLDVQ.Z m512 zmm k zmm +// VPSHLDVQ.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVQ.Z instruction to the active function. +func (c *Context) VPSHLDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDVQ_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHLDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.Z m128 xmm k xmm +// VPSHLDVQ.Z m256 ymm k ymm +// VPSHLDVQ.Z xmm xmm k xmm +// VPSHLDVQ.Z ymm ymm k ymm +// VPSHLDVQ.Z m512 zmm k zmm +// VPSHLDVQ.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVQ.Z instruction to the active function. +// Operates on the global context. +func VPSHLDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDVQ_Z(mxyz, xyz, k, xyz1) } + +// VPSHLDVW: Concatenate Words and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVW m128 xmm k xmm +// VPSHLDVW m128 xmm xmm +// VPSHLDVW m256 ymm k ymm +// VPSHLDVW m256 ymm ymm +// VPSHLDVW xmm xmm k xmm +// VPSHLDVW xmm xmm xmm +// VPSHLDVW ymm ymm k ymm +// VPSHLDVW ymm ymm ymm +// VPSHLDVW m512 zmm k zmm +// VPSHLDVW m512 zmm zmm +// VPSHLDVW zmm zmm k zmm +// VPSHLDVW zmm zmm zmm +// +// Construct and append a VPSHLDVW instruction to the active function. +func (c *Context) VPSHLDVW(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDVW(ops...)) +} + +// VPSHLDVW: Concatenate Words and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVW m128 xmm k xmm +// VPSHLDVW m128 xmm xmm +// VPSHLDVW m256 ymm k ymm +// VPSHLDVW m256 ymm ymm +// VPSHLDVW xmm xmm k xmm +// VPSHLDVW xmm xmm xmm +// VPSHLDVW ymm ymm k ymm +// VPSHLDVW ymm ymm ymm +// VPSHLDVW m512 zmm k zmm +// VPSHLDVW m512 zmm zmm +// VPSHLDVW zmm zmm k zmm +// VPSHLDVW zmm zmm zmm +// +// Construct and append a VPSHLDVW instruction to the active function. +// Operates on the global context. +func VPSHLDVW(ops ...operand.Op) { ctx.VPSHLDVW(ops...) } + +// VPSHLDVW_Z: Concatenate Words and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVW.Z m128 xmm k xmm +// VPSHLDVW.Z m256 ymm k ymm +// VPSHLDVW.Z xmm xmm k xmm +// VPSHLDVW.Z ymm ymm k ymm +// VPSHLDVW.Z m512 zmm k zmm +// VPSHLDVW.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVW.Z instruction to the active function. +func (c *Context) VPSHLDVW_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDVW_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHLDVW_Z: Concatenate Words and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVW.Z m128 xmm k xmm +// VPSHLDVW.Z m256 ymm k ymm +// VPSHLDVW.Z xmm xmm k xmm +// VPSHLDVW.Z ymm ymm k ymm +// VPSHLDVW.Z m512 zmm k zmm +// VPSHLDVW.Z zmm zmm k zmm +// +// Construct and append a VPSHLDVW.Z instruction to the active function. +// Operates on the global context. +func VPSHLDVW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDVW_Z(mxyz, xyz, k, xyz1) } + +// VPSHLDW: Concatenate Words and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDW imm8 m128 xmm k xmm +// VPSHLDW imm8 m128 xmm xmm +// VPSHLDW imm8 m256 ymm k ymm +// VPSHLDW imm8 m256 ymm ymm +// VPSHLDW imm8 xmm xmm k xmm +// VPSHLDW imm8 xmm xmm xmm +// VPSHLDW imm8 ymm ymm k ymm +// VPSHLDW imm8 ymm ymm ymm +// VPSHLDW imm8 m512 zmm k zmm +// VPSHLDW imm8 m512 zmm zmm +// VPSHLDW imm8 zmm zmm k zmm +// VPSHLDW imm8 zmm zmm zmm +// +// Construct and append a VPSHLDW instruction to the active function. +func (c *Context) VPSHLDW(ops ...operand.Op) { + c.addinstruction(x86.VPSHLDW(ops...)) +} + +// VPSHLDW: Concatenate Words and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDW imm8 m128 xmm k xmm +// VPSHLDW imm8 m128 xmm xmm +// VPSHLDW imm8 m256 ymm k ymm +// VPSHLDW imm8 m256 ymm ymm +// VPSHLDW imm8 xmm xmm k xmm +// VPSHLDW imm8 xmm xmm xmm +// VPSHLDW imm8 ymm ymm k ymm +// VPSHLDW imm8 ymm ymm ymm +// VPSHLDW imm8 m512 zmm k zmm +// VPSHLDW imm8 m512 zmm zmm +// VPSHLDW imm8 zmm zmm k zmm +// VPSHLDW imm8 zmm zmm zmm +// +// Construct and append a VPSHLDW instruction to the active function. +// Operates on the global context. +func VPSHLDW(ops ...operand.Op) { ctx.VPSHLDW(ops...) } + +// VPSHLDW_Z: Concatenate Words and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDW.Z imm8 m128 xmm k xmm +// VPSHLDW.Z imm8 m256 ymm k ymm +// VPSHLDW.Z imm8 xmm xmm k xmm +// VPSHLDW.Z imm8 ymm ymm k ymm +// VPSHLDW.Z imm8 m512 zmm k zmm +// VPSHLDW.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDW.Z instruction to the active function. +func (c *Context) VPSHLDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHLDW_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHLDW_Z: Concatenate Words and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDW.Z imm8 m128 xmm k xmm +// VPSHLDW.Z imm8 m256 ymm k ymm +// VPSHLDW.Z imm8 xmm xmm k xmm +// VPSHLDW.Z imm8 ymm ymm k ymm +// VPSHLDW.Z imm8 m512 zmm k zmm +// VPSHLDW.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHLDW.Z instruction to the active function. +// Operates on the global context. +func VPSHLDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHLDW_Z(i, mxyz, xyz, k, xyz1) } + +// VPSHRDD: Concatenate Dwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDD imm8 m128 xmm k xmm +// VPSHRDD imm8 m128 xmm xmm +// VPSHRDD imm8 m256 ymm k ymm +// VPSHRDD imm8 m256 ymm ymm +// VPSHRDD imm8 xmm xmm k xmm +// VPSHRDD imm8 xmm xmm xmm +// VPSHRDD imm8 ymm ymm k ymm +// VPSHRDD imm8 ymm ymm ymm +// VPSHRDD imm8 m512 zmm k zmm +// VPSHRDD imm8 m512 zmm zmm +// VPSHRDD imm8 zmm zmm k zmm +// VPSHRDD imm8 zmm zmm zmm +// +// Construct and append a VPSHRDD instruction to the active function. +func (c *Context) VPSHRDD(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDD(ops...)) +} + +// VPSHRDD: Concatenate Dwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDD imm8 m128 xmm k xmm +// VPSHRDD imm8 m128 xmm xmm +// VPSHRDD imm8 m256 ymm k ymm +// VPSHRDD imm8 m256 ymm ymm +// VPSHRDD imm8 xmm xmm k xmm +// VPSHRDD imm8 xmm xmm xmm +// VPSHRDD imm8 ymm ymm k ymm +// VPSHRDD imm8 ymm ymm ymm +// VPSHRDD imm8 m512 zmm k zmm +// VPSHRDD imm8 m512 zmm zmm +// VPSHRDD imm8 zmm zmm k zmm +// VPSHRDD imm8 zmm zmm zmm +// +// Construct and append a VPSHRDD instruction to the active function. +// Operates on the global context. +func VPSHRDD(ops ...operand.Op) { ctx.VPSHRDD(ops...) } + +// VPSHRDD_BCST: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDD.BCST imm8 m32 xmm k xmm +// VPSHRDD.BCST imm8 m32 xmm xmm +// VPSHRDD.BCST imm8 m32 ymm k ymm +// VPSHRDD.BCST imm8 m32 ymm ymm +// VPSHRDD.BCST imm8 m32 zmm k zmm +// VPSHRDD.BCST imm8 m32 zmm zmm +// +// Construct and append a VPSHRDD.BCST instruction to the active function. +func (c *Context) VPSHRDD_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDD_BCST(ops...)) +} + +// VPSHRDD_BCST: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDD.BCST imm8 m32 xmm k xmm +// VPSHRDD.BCST imm8 m32 xmm xmm +// VPSHRDD.BCST imm8 m32 ymm k ymm +// VPSHRDD.BCST imm8 m32 ymm ymm +// VPSHRDD.BCST imm8 m32 zmm k zmm +// VPSHRDD.BCST imm8 m32 zmm zmm +// +// Construct and append a VPSHRDD.BCST instruction to the active function. +// Operates on the global context. +func VPSHRDD_BCST(ops ...operand.Op) { ctx.VPSHRDD_BCST(ops...) } + +// VPSHRDD_BCST_Z: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDD.BCST.Z imm8 m32 xmm k xmm +// VPSHRDD.BCST.Z imm8 m32 ymm k ymm +// VPSHRDD.BCST.Z imm8 m32 zmm k zmm +// +// Construct and append a VPSHRDD.BCST.Z instruction to the active function. +func (c *Context) VPSHRDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDD_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VPSHRDD_BCST_Z: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDD.BCST.Z imm8 m32 xmm k xmm +// VPSHRDD.BCST.Z imm8 m32 ymm k ymm +// VPSHRDD.BCST.Z imm8 m32 zmm k zmm +// +// Construct and append a VPSHRDD.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHRDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPSHRDD_BCST_Z(i, m, xyz, k, xyz1) } + +// VPSHRDD_Z: Concatenate Dwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDD.Z imm8 m128 xmm k xmm +// VPSHRDD.Z imm8 m256 ymm k ymm +// VPSHRDD.Z imm8 xmm xmm k xmm +// VPSHRDD.Z imm8 ymm ymm k ymm +// VPSHRDD.Z imm8 m512 zmm k zmm +// VPSHRDD.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDD.Z instruction to the active function. +func (c *Context) VPSHRDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDD_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHRDD_Z: Concatenate Dwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDD.Z imm8 m128 xmm k xmm +// VPSHRDD.Z imm8 m256 ymm k ymm +// VPSHRDD.Z imm8 xmm xmm k xmm +// VPSHRDD.Z imm8 ymm ymm k ymm +// VPSHRDD.Z imm8 m512 zmm k zmm +// VPSHRDD.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDD.Z instruction to the active function. +// Operates on the global context. +func VPSHRDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDD_Z(i, mxyz, xyz, k, xyz1) } + +// VPSHRDQ: Concatenate Quadwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDQ imm8 m128 xmm k xmm +// VPSHRDQ imm8 m128 xmm xmm +// VPSHRDQ imm8 m256 ymm k ymm +// VPSHRDQ imm8 m256 ymm ymm +// VPSHRDQ imm8 xmm xmm k xmm +// VPSHRDQ imm8 xmm xmm xmm +// VPSHRDQ imm8 ymm ymm k ymm +// VPSHRDQ imm8 ymm ymm ymm +// VPSHRDQ imm8 m512 zmm k zmm +// VPSHRDQ imm8 m512 zmm zmm +// VPSHRDQ imm8 zmm zmm k zmm +// VPSHRDQ imm8 zmm zmm zmm +// +// Construct and append a VPSHRDQ instruction to the active function. +func (c *Context) VPSHRDQ(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDQ(ops...)) +} + +// VPSHRDQ: Concatenate Quadwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDQ imm8 m128 xmm k xmm +// VPSHRDQ imm8 m128 xmm xmm +// VPSHRDQ imm8 m256 ymm k ymm +// VPSHRDQ imm8 m256 ymm ymm +// VPSHRDQ imm8 xmm xmm k xmm +// VPSHRDQ imm8 xmm xmm xmm +// VPSHRDQ imm8 ymm ymm k ymm +// VPSHRDQ imm8 ymm ymm ymm +// VPSHRDQ imm8 m512 zmm k zmm +// VPSHRDQ imm8 m512 zmm zmm +// VPSHRDQ imm8 zmm zmm k zmm +// VPSHRDQ imm8 zmm zmm zmm +// +// Construct and append a VPSHRDQ instruction to the active function. +// Operates on the global context. +func VPSHRDQ(ops ...operand.Op) { ctx.VPSHRDQ(ops...) } + +// VPSHRDQ_BCST: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDQ.BCST imm8 m64 xmm k xmm +// VPSHRDQ.BCST imm8 m64 xmm xmm +// VPSHRDQ.BCST imm8 m64 ymm k ymm +// VPSHRDQ.BCST imm8 m64 ymm ymm +// VPSHRDQ.BCST imm8 m64 zmm k zmm +// VPSHRDQ.BCST imm8 m64 zmm zmm +// +// Construct and append a VPSHRDQ.BCST instruction to the active function. +func (c *Context) VPSHRDQ_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDQ_BCST(ops...)) +} + +// VPSHRDQ_BCST: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDQ.BCST imm8 m64 xmm k xmm +// VPSHRDQ.BCST imm8 m64 xmm xmm +// VPSHRDQ.BCST imm8 m64 ymm k ymm +// VPSHRDQ.BCST imm8 m64 ymm ymm +// VPSHRDQ.BCST imm8 m64 zmm k zmm +// VPSHRDQ.BCST imm8 m64 zmm zmm +// +// Construct and append a VPSHRDQ.BCST instruction to the active function. +// Operates on the global context. +func VPSHRDQ_BCST(ops ...operand.Op) { ctx.VPSHRDQ_BCST(ops...) } + +// VPSHRDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHRDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHRDQ.BCST.Z imm8 m64 zmm k zmm +// +// Construct and append a VPSHRDQ.BCST.Z instruction to the active function. +func (c *Context) VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1)) +} + +// VPSHRDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHRDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHRDQ.BCST.Z imm8 m64 zmm k zmm +// +// Construct and append a VPSHRDQ.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) { ctx.VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1) } + +// VPSHRDQ_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.Z imm8 m128 xmm k xmm +// VPSHRDQ.Z imm8 m256 ymm k ymm +// VPSHRDQ.Z imm8 xmm xmm k xmm +// VPSHRDQ.Z imm8 ymm ymm k ymm +// VPSHRDQ.Z imm8 m512 zmm k zmm +// VPSHRDQ.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDQ.Z instruction to the active function. +func (c *Context) VPSHRDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDQ_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHRDQ_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.Z imm8 m128 xmm k xmm +// VPSHRDQ.Z imm8 m256 ymm k ymm +// VPSHRDQ.Z imm8 xmm xmm k xmm +// VPSHRDQ.Z imm8 ymm ymm k ymm +// VPSHRDQ.Z imm8 m512 zmm k zmm +// VPSHRDQ.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDQ.Z instruction to the active function. +// Operates on the global context. +func VPSHRDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDQ_Z(i, mxyz, xyz, k, xyz1) } + +// VPSHRDVD: Concatenate Dwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVD m128 xmm k xmm +// VPSHRDVD m128 xmm xmm +// VPSHRDVD m256 ymm k ymm +// VPSHRDVD m256 ymm ymm +// VPSHRDVD xmm xmm k xmm +// VPSHRDVD xmm xmm xmm +// VPSHRDVD ymm ymm k ymm +// VPSHRDVD ymm ymm ymm +// VPSHRDVD m512 zmm k zmm +// VPSHRDVD m512 zmm zmm +// VPSHRDVD zmm zmm k zmm +// VPSHRDVD zmm zmm zmm +// +// Construct and append a VPSHRDVD instruction to the active function. +func (c *Context) VPSHRDVD(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDVD(ops...)) +} + +// VPSHRDVD: Concatenate Dwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVD m128 xmm k xmm +// VPSHRDVD m128 xmm xmm +// VPSHRDVD m256 ymm k ymm +// VPSHRDVD m256 ymm ymm +// VPSHRDVD xmm xmm k xmm +// VPSHRDVD xmm xmm xmm +// VPSHRDVD ymm ymm k ymm +// VPSHRDVD ymm ymm ymm +// VPSHRDVD m512 zmm k zmm +// VPSHRDVD m512 zmm zmm +// VPSHRDVD zmm zmm k zmm +// VPSHRDVD zmm zmm zmm +// +// Construct and append a VPSHRDVD instruction to the active function. +// Operates on the global context. +func VPSHRDVD(ops ...operand.Op) { ctx.VPSHRDVD(ops...) } + +// VPSHRDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVD.BCST m32 xmm k xmm +// VPSHRDVD.BCST m32 xmm xmm +// VPSHRDVD.BCST m32 ymm k ymm +// VPSHRDVD.BCST m32 ymm ymm +// VPSHRDVD.BCST m32 zmm k zmm +// VPSHRDVD.BCST m32 zmm zmm +// +// Construct and append a VPSHRDVD.BCST instruction to the active function. +func (c *Context) VPSHRDVD_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDVD_BCST(ops...)) +} + +// VPSHRDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVD.BCST m32 xmm k xmm +// VPSHRDVD.BCST m32 xmm xmm +// VPSHRDVD.BCST m32 ymm k ymm +// VPSHRDVD.BCST m32 ymm ymm +// VPSHRDVD.BCST m32 zmm k zmm +// VPSHRDVD.BCST m32 zmm zmm +// +// Construct and append a VPSHRDVD.BCST instruction to the active function. +// Operates on the global context. +func VPSHRDVD_BCST(ops ...operand.Op) { ctx.VPSHRDVD_BCST(ops...) } + +// VPSHRDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.BCST.Z m32 xmm k xmm +// VPSHRDVD.BCST.Z m32 ymm k ymm +// VPSHRDVD.BCST.Z m32 zmm k zmm +// +// Construct and append a VPSHRDVD.BCST.Z instruction to the active function. +func (c *Context) VPSHRDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDVD_BCST_Z(m, xyz, k, xyz1)) +} + +// VPSHRDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.BCST.Z m32 xmm k xmm +// VPSHRDVD.BCST.Z m32 ymm k ymm +// VPSHRDVD.BCST.Z m32 zmm k zmm +// +// Construct and append a VPSHRDVD.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHRDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSHRDVD_BCST_Z(m, xyz, k, xyz1) } + +// VPSHRDVD_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.Z m128 xmm k xmm +// VPSHRDVD.Z m256 ymm k ymm +// VPSHRDVD.Z xmm xmm k xmm +// VPSHRDVD.Z ymm ymm k ymm +// VPSHRDVD.Z m512 zmm k zmm +// VPSHRDVD.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVD.Z instruction to the active function. +func (c *Context) VPSHRDVD_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDVD_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHRDVD_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.Z m128 xmm k xmm +// VPSHRDVD.Z m256 ymm k ymm +// VPSHRDVD.Z xmm xmm k xmm +// VPSHRDVD.Z ymm ymm k ymm +// VPSHRDVD.Z m512 zmm k zmm +// VPSHRDVD.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVD.Z instruction to the active function. +// Operates on the global context. +func VPSHRDVD_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDVD_Z(mxyz, xyz, k, xyz1) } + +// VPSHRDVQ: Concatenate Quadwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVQ m128 xmm k xmm +// VPSHRDVQ m128 xmm xmm +// VPSHRDVQ m256 ymm k ymm +// VPSHRDVQ m256 ymm ymm +// VPSHRDVQ xmm xmm k xmm +// VPSHRDVQ xmm xmm xmm +// VPSHRDVQ ymm ymm k ymm +// VPSHRDVQ ymm ymm ymm +// VPSHRDVQ m512 zmm k zmm +// VPSHRDVQ m512 zmm zmm +// VPSHRDVQ zmm zmm k zmm +// VPSHRDVQ zmm zmm zmm +// +// Construct and append a VPSHRDVQ instruction to the active function. +func (c *Context) VPSHRDVQ(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDVQ(ops...)) +} + +// VPSHRDVQ: Concatenate Quadwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVQ m128 xmm k xmm +// VPSHRDVQ m128 xmm xmm +// VPSHRDVQ m256 ymm k ymm +// VPSHRDVQ m256 ymm ymm +// VPSHRDVQ xmm xmm k xmm +// VPSHRDVQ xmm xmm xmm +// VPSHRDVQ ymm ymm k ymm +// VPSHRDVQ ymm ymm ymm +// VPSHRDVQ m512 zmm k zmm +// VPSHRDVQ m512 zmm zmm +// VPSHRDVQ zmm zmm k zmm +// VPSHRDVQ zmm zmm zmm +// +// Construct and append a VPSHRDVQ instruction to the active function. +// Operates on the global context. +func VPSHRDVQ(ops ...operand.Op) { ctx.VPSHRDVQ(ops...) } + +// VPSHRDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVQ.BCST m64 xmm k xmm +// VPSHRDVQ.BCST m64 xmm xmm +// VPSHRDVQ.BCST m64 ymm k ymm +// VPSHRDVQ.BCST m64 ymm ymm +// VPSHRDVQ.BCST m64 zmm k zmm +// VPSHRDVQ.BCST m64 zmm zmm +// +// Construct and append a VPSHRDVQ.BCST instruction to the active function. +func (c *Context) VPSHRDVQ_BCST(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDVQ_BCST(ops...)) +} + +// VPSHRDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVQ.BCST m64 xmm k xmm +// VPSHRDVQ.BCST m64 xmm xmm +// VPSHRDVQ.BCST m64 ymm k ymm +// VPSHRDVQ.BCST m64 ymm ymm +// VPSHRDVQ.BCST m64 zmm k zmm +// VPSHRDVQ.BCST m64 zmm zmm +// +// Construct and append a VPSHRDVQ.BCST instruction to the active function. +// Operates on the global context. +func VPSHRDVQ_BCST(ops ...operand.Op) { ctx.VPSHRDVQ_BCST(ops...) } + +// VPSHRDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.BCST.Z m64 xmm k xmm +// VPSHRDVQ.BCST.Z m64 ymm k ymm +// VPSHRDVQ.BCST.Z m64 zmm k zmm +// +// Construct and append a VPSHRDVQ.BCST.Z instruction to the active function. +func (c *Context) VPSHRDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDVQ_BCST_Z(m, xyz, k, xyz1)) +} + +// VPSHRDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.BCST.Z m64 xmm k xmm +// VPSHRDVQ.BCST.Z m64 ymm k ymm +// VPSHRDVQ.BCST.Z m64 zmm k zmm +// +// Construct and append a VPSHRDVQ.BCST.Z instruction to the active function. +// Operates on the global context. +func VPSHRDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) { ctx.VPSHRDVQ_BCST_Z(m, xyz, k, xyz1) } + +// VPSHRDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.Z m128 xmm k xmm +// VPSHRDVQ.Z m256 ymm k ymm +// VPSHRDVQ.Z xmm xmm k xmm +// VPSHRDVQ.Z ymm ymm k ymm +// VPSHRDVQ.Z m512 zmm k zmm +// VPSHRDVQ.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVQ.Z instruction to the active function. +func (c *Context) VPSHRDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDVQ_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHRDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.Z m128 xmm k xmm +// VPSHRDVQ.Z m256 ymm k ymm +// VPSHRDVQ.Z xmm xmm k xmm +// VPSHRDVQ.Z ymm ymm k ymm +// VPSHRDVQ.Z m512 zmm k zmm +// VPSHRDVQ.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVQ.Z instruction to the active function. +// Operates on the global context. +func VPSHRDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDVQ_Z(mxyz, xyz, k, xyz1) } + +// VPSHRDVW: Concatenate Words and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVW m128 xmm k xmm +// VPSHRDVW m128 xmm xmm +// VPSHRDVW m256 ymm k ymm +// VPSHRDVW m256 ymm ymm +// VPSHRDVW xmm xmm k xmm +// VPSHRDVW xmm xmm xmm +// VPSHRDVW ymm ymm k ymm +// VPSHRDVW ymm ymm ymm +// VPSHRDVW m512 zmm k zmm +// VPSHRDVW m512 zmm zmm +// VPSHRDVW zmm zmm k zmm +// VPSHRDVW zmm zmm zmm +// +// Construct and append a VPSHRDVW instruction to the active function. +func (c *Context) VPSHRDVW(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDVW(ops...)) +} + +// VPSHRDVW: Concatenate Words and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVW m128 xmm k xmm +// VPSHRDVW m128 xmm xmm +// VPSHRDVW m256 ymm k ymm +// VPSHRDVW m256 ymm ymm +// VPSHRDVW xmm xmm k xmm +// VPSHRDVW xmm xmm xmm +// VPSHRDVW ymm ymm k ymm +// VPSHRDVW ymm ymm ymm +// VPSHRDVW m512 zmm k zmm +// VPSHRDVW m512 zmm zmm +// VPSHRDVW zmm zmm k zmm +// VPSHRDVW zmm zmm zmm +// +// Construct and append a VPSHRDVW instruction to the active function. +// Operates on the global context. +func VPSHRDVW(ops ...operand.Op) { ctx.VPSHRDVW(ops...) } + +// VPSHRDVW_Z: Concatenate Words and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVW.Z m128 xmm k xmm +// VPSHRDVW.Z m256 ymm k ymm +// VPSHRDVW.Z xmm xmm k xmm +// VPSHRDVW.Z ymm ymm k ymm +// VPSHRDVW.Z m512 zmm k zmm +// VPSHRDVW.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVW.Z instruction to the active function. +func (c *Context) VPSHRDVW_Z(mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDVW_Z(mxyz, xyz, k, xyz1)) +} + +// VPSHRDVW_Z: Concatenate Words and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVW.Z m128 xmm k xmm +// VPSHRDVW.Z m256 ymm k ymm +// VPSHRDVW.Z xmm xmm k xmm +// VPSHRDVW.Z ymm ymm k ymm +// VPSHRDVW.Z m512 zmm k zmm +// VPSHRDVW.Z zmm zmm k zmm +// +// Construct and append a VPSHRDVW.Z instruction to the active function. +// Operates on the global context. +func VPSHRDVW_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDVW_Z(mxyz, xyz, k, xyz1) } + +// VPSHRDW: Concatenate Words and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDW imm8 m128 xmm k xmm +// VPSHRDW imm8 m128 xmm xmm +// VPSHRDW imm8 m256 ymm k ymm +// VPSHRDW imm8 m256 ymm ymm +// VPSHRDW imm8 xmm xmm k xmm +// VPSHRDW imm8 xmm xmm xmm +// VPSHRDW imm8 ymm ymm k ymm +// VPSHRDW imm8 ymm ymm ymm +// VPSHRDW imm8 m512 zmm k zmm +// VPSHRDW imm8 m512 zmm zmm +// VPSHRDW imm8 zmm zmm k zmm +// VPSHRDW imm8 zmm zmm zmm +// +// Construct and append a VPSHRDW instruction to the active function. +func (c *Context) VPSHRDW(ops ...operand.Op) { + c.addinstruction(x86.VPSHRDW(ops...)) +} + +// VPSHRDW: Concatenate Words and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDW imm8 m128 xmm k xmm +// VPSHRDW imm8 m128 xmm xmm +// VPSHRDW imm8 m256 ymm k ymm +// VPSHRDW imm8 m256 ymm ymm +// VPSHRDW imm8 xmm xmm k xmm +// VPSHRDW imm8 xmm xmm xmm +// VPSHRDW imm8 ymm ymm k ymm +// VPSHRDW imm8 ymm ymm ymm +// VPSHRDW imm8 m512 zmm k zmm +// VPSHRDW imm8 m512 zmm zmm +// VPSHRDW imm8 zmm zmm k zmm +// VPSHRDW imm8 zmm zmm zmm +// +// Construct and append a VPSHRDW instruction to the active function. +// Operates on the global context. +func VPSHRDW(ops ...operand.Op) { ctx.VPSHRDW(ops...) } + +// VPSHRDW_Z: Concatenate Words and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDW.Z imm8 m128 xmm k xmm +// VPSHRDW.Z imm8 m256 ymm k ymm +// VPSHRDW.Z imm8 xmm xmm k xmm +// VPSHRDW.Z imm8 ymm ymm k ymm +// VPSHRDW.Z imm8 m512 zmm k zmm +// VPSHRDW.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDW.Z instruction to the active function. +func (c *Context) VPSHRDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) { + c.addinstruction(x86.VPSHRDW_Z(i, mxyz, xyz, k, xyz1)) +} + +// VPSHRDW_Z: Concatenate Words and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDW.Z imm8 m128 xmm k xmm +// VPSHRDW.Z imm8 m256 ymm k ymm +// VPSHRDW.Z imm8 xmm xmm k xmm +// VPSHRDW.Z imm8 ymm ymm k ymm +// VPSHRDW.Z imm8 m512 zmm k zmm +// VPSHRDW.Z imm8 zmm zmm k zmm +// +// Construct and append a VPSHRDW.Z instruction to the active function. +// Operates on the global context. +func VPSHRDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) { ctx.VPSHRDW_Z(i, mxyz, xyz, k, xyz1) } + // VPSHUFB: Packed Shuffle Bytes. // // Forms: diff --git a/build/zinstructions_test.go b/build/zinstructions_test.go index e3c4469..2427ef9 100644 --- a/build/zinstructions_test.go +++ b/build/zinstructions_test.go @@ -2384,10 +2384,14 @@ func TestContextInstructions(t *testing.T) { ctx.VPCMPUQ_BCST(opimm8, opm64, opxmm, opk, opk) ctx.VPCMPUW(opimm8, opm128, opxmm, opk, opk) ctx.VPCMPW(opimm8, opm128, opxmm, opk, opk) + ctx.VPCOMPRESSB(opxmm, opk, opm128) + ctx.VPCOMPRESSB_Z(opxmm, opk, opxmm) ctx.VPCOMPRESSD(opxmm, opk, opm128) ctx.VPCOMPRESSD_Z(opxmm, opk, opm128) ctx.VPCOMPRESSQ(opxmm, opk, opm128) ctx.VPCOMPRESSQ_Z(opxmm, opk, opm128) + ctx.VPCOMPRESSW(opxmm, opk, opm128) + ctx.VPCOMPRESSW_Z(opxmm, opk, opxmm) ctx.VPCONFLICTD(opm128, opk, opxmm) ctx.VPCONFLICTD_BCST(opm32, opk, opxmm) ctx.VPCONFLICTD_BCST_Z(opm32, opk, opxmm) @@ -2482,10 +2486,14 @@ func TestContextInstructions(t *testing.T) { ctx.VPERMT2W_Z(opm128, opxmm, opk, opxmm) ctx.VPERMW(opm128, opxmm, opk, opxmm) ctx.VPERMW_Z(opm128, opxmm, opk, opxmm) + ctx.VPEXPANDB(opm128, opk, opxmm) + ctx.VPEXPANDB_Z(opm128, opk, opxmm) ctx.VPEXPANDD(opm128, opk, opxmm) ctx.VPEXPANDD_Z(opm128, opk, opxmm) ctx.VPEXPANDQ(opm128, opk, opxmm) ctx.VPEXPANDQ_Z(opm128, opk, opxmm) + ctx.VPEXPANDW(opm128, opk, opxmm) + ctx.VPEXPANDW_Z(opm128, opk, opxmm) ctx.VPEXTRB(opimm8, opxmm, opm8) ctx.VPEXTRD(opimm8, opxmm, opm32) ctx.VPEXTRQ(opimm8, opxmm, opm64) @@ -2730,6 +2738,46 @@ func TestContextInstructions(t *testing.T) { ctx.VPSCATTERDQ(opxmm, opk, opvm32x) ctx.VPSCATTERQD(opxmm, opk, opvm64x) ctx.VPSCATTERQQ(opxmm, opk, opvm64x) + ctx.VPSHLDD(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHLDD_BCST(opimm8, opm32, opxmm, opk, opxmm) + ctx.VPSHLDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm) + ctx.VPSHLDD_Z(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHLDQ(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHLDQ_BCST(opimm8, opm64, opxmm, opk, opxmm) + ctx.VPSHLDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm) + ctx.VPSHLDQ_Z(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHLDVD(opm128, opxmm, opk, opxmm) + ctx.VPSHLDVD_BCST(opm32, opxmm, opk, opxmm) + ctx.VPSHLDVD_BCST_Z(opm32, opxmm, opk, opxmm) + ctx.VPSHLDVD_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHLDVQ(opm128, opxmm, opk, opxmm) + ctx.VPSHLDVQ_BCST(opm64, opxmm, opk, opxmm) + ctx.VPSHLDVQ_BCST_Z(opm64, opxmm, opk, opxmm) + ctx.VPSHLDVQ_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHLDVW(opm128, opxmm, opk, opxmm) + ctx.VPSHLDVW_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHLDW(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHLDW_Z(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDD(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDD_BCST(opimm8, opm32, opxmm, opk, opxmm) + ctx.VPSHRDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm) + ctx.VPSHRDD_Z(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDQ(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDQ_BCST(opimm8, opm64, opxmm, opk, opxmm) + ctx.VPSHRDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm) + ctx.VPSHRDQ_Z(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDVD(opm128, opxmm, opk, opxmm) + ctx.VPSHRDVD_BCST(opm32, opxmm, opk, opxmm) + ctx.VPSHRDVD_BCST_Z(opm32, opxmm, opk, opxmm) + ctx.VPSHRDVD_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHRDVQ(opm128, opxmm, opk, opxmm) + ctx.VPSHRDVQ_BCST(opm64, opxmm, opk, opxmm) + ctx.VPSHRDVQ_BCST_Z(opm64, opxmm, opk, opxmm) + ctx.VPSHRDVQ_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHRDVW(opm128, opxmm, opk, opxmm) + ctx.VPSHRDVW_Z(opm128, opxmm, opk, opxmm) + ctx.VPSHRDW(opimm8, opm128, opxmm, opk, opxmm) + ctx.VPSHRDW_Z(opimm8, opm128, opxmm, opk, opxmm) ctx.VPSHUFB(opm256, opymm, opymm) ctx.VPSHUFBITQMB(opm128, opxmm, opk, opk) ctx.VPSHUFB_Z(opm128, opxmm, opk, opxmm) diff --git a/internal/inst/ztable.go b/internal/inst/ztable.go index e50fccd..7a9986c 100644 --- a/internal/inst/ztable.go +++ b/internal/inst/ztable.go @@ -70006,6 +70006,144 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VPCOMPRESSB", + Summary: "Store Sparse Packed Byte Integer Values into Dense Memory/Register", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m128", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "m128", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m256", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "m256", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m512", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "m512", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, { Opcode: "VPCOMPRESSD", Summary: "Store Sparse Packed Doubleword Integer Values into Dense Memory/Register", @@ -70342,6 +70480,144 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VPCOMPRESSW", + Summary: "Store Sparse Packed Word Integer Values into Dense Memory/Register", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m128", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "m128", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m256", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "m256", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "m512", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "m512", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, { Opcode: "VPCONFLICTD", Summary: "Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register", @@ -77714,6 +77990,174 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VPEXPANDB", + Summary: "Load Sparse Packed Byte Integer Values from Dense Memory/Register", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, { Opcode: "VPEXPANDD", Summary: "Load Sparse Packed Doubleword Integer Values from Dense Memory/Register", @@ -78050,6 +78494,174 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VPEXPANDW", + Summary: "Load Sparse Packed Word Integer Values from Dense Memory/Register", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, { Opcode: "VPEXTRB", Summary: "Extract Byte", @@ -95454,6 +96066,3174 @@ var Instructions = []Instruction{ }, }, }, + { + Opcode: "VPSHLDD", + Summary: "Concatenate Dwords and Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHLDQ", + Summary: "Concatenate Quadwords and Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHLDVD", + Summary: "Concatenate Dwords and Variable Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHLDVQ", + Summary: "Concatenate Quadwords and Variable Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHLDVW", + Summary: "Concatenate Words and Variable Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHLDW", + Summary: "Concatenate Words and Shift Packed Data Left Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDD", + Summary: "Concatenate Dwords and Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDQ", + Summary: "Concatenate Quadwords and Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDVD", + Summary: "Concatenate Dwords and Variable Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m32", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDVQ", + Summary: "Concatenate Quadwords and Variable Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m64", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Broadcast: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDVW", + Summary: "Concatenate Words and Variable Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, + { + Opcode: "VPSHRDW", + Summary: "Concatenate Words and Shift Packed Data Right Logical", + Forms: []Form{ + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m128", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m256", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x1}, + {Type: "xmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x1}, + {Type: "ymm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "m512", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x3}, + }, + EncodingType: 0x4, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "k", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + Zeroing: true, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []Operand{ + {Type: "imm8", Action: 0x0}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x1}, + {Type: "zmm", Action: 0x2}, + }, + EncodingType: 0x4, + }, + }, + }, { Opcode: "VPSHUFB", Summary: "Packed Shuffle Bytes", diff --git a/internal/opcodesextra/bitalg.go b/internal/opcodesextra/bitalg.go index a64f1f0..999de20 100644 --- a/internal/opcodesextra/bitalg.go +++ b/internal/opcodesextra/bitalg.go @@ -133,56 +133,4 @@ var vpshufbitqmb = inst.Forms{ // {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}}, // {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}}, // } -var vpopcntb = inst.Forms{ - // EVEX.128.66.0F38.W0 54 /r VPOPCNTB xmm1{k1}{z}, xmm2/m128 - { - ISA: []string{"AVX512BITALG", "AVX512VL"}, - Operands: []inst.Operand{ - {Type: "m128", Action: inst.R}, - {Type: "xmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512BITALG", "AVX512VL"}, - Operands: []inst.Operand{ - {Type: "xmm", Action: inst.R}, - {Type: "xmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - // EVEX.256.66.0F38.W0 54 /r VPOPCNTB ymm1{k1}{z}, ymm2/m256 - { - ISA: []string{"AVX512BITALG", "AVX512VL"}, - Operands: []inst.Operand{ - {Type: "m256", Action: inst.R}, - {Type: "ymm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512BITALG", "AVX512VL"}, - Operands: []inst.Operand{ - {Type: "ymm", Action: inst.R}, - {Type: "ymm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - // EVEX.512.66.0F38.W0 54 /r VPOPCNTB zmm1{k1}{z}, zmm2/m512 - { - ISA: []string{"AVX512BITALG"}, - Operands: []inst.Operand{ - {Type: "m512", Action: inst.R}, - {Type: "zmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512BITALG"}, - Operands: []inst.Operand{ - {Type: "zmm", Action: inst.R}, - {Type: "zmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, -} +var vpopcntb = _yvexpandpd("AVX512BITALG", "") diff --git a/internal/opcodesextra/forms.go b/internal/opcodesextra/forms.go new file mode 100644 index 0000000..7837249 --- /dev/null +++ b/internal/opcodesextra/forms.go @@ -0,0 +1,72 @@ +package opcodesextra + +import "github.com/mmcloughlin/avo/internal/inst" + +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L376-L383 +// +// var _yvexpandpd = []ytab{ +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YxmEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YymEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}}, +// } +func _yvexpandpd(isa, bcst string) inst.Forms { + return inst.Forms{ + // EVEX.128.66.0F38.W0 62 /r VPEXPANDB xmm1{k1}{z}, m128 A V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{isa, "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "m128" + bcst, Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.128.66.0F38.W0 62 /r VPEXPANDB xmm1{k1}{z}, xmm2 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{isa, "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F38.W0 62 /r VPEXPANDB ymm1{k1}{z}, m256 A V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{isa, "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "m256" + bcst, Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F38.W0 62 /r VPEXPANDB ymm1{k1}{z}, ymm2 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{isa, "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F38.W0 62 /r VPEXPANDB zmm1{k1}{z}, m512 A V/V AVX512_VBMI2 + { + ISA: []string{isa}, + Operands: []inst.Operand{ + {Type: "m512" + bcst, Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F38.W0 62 /r VPEXPANDB zmm1{k1}{z}, zmm2 B V/V AVX512_VBMI2 + { + ISA: []string{isa}, + Operands: []inst.Operand{ + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + } +} diff --git a/internal/opcodesextra/instructions.go b/internal/opcodesextra/instructions.go index c88e15d..4b5258f 100644 --- a/internal/opcodesextra/instructions.go +++ b/internal/opcodesextra/instructions.go @@ -1,7 +1,11 @@ // Package opcodesextra provides curated extensions to the instruction database. package opcodesextra -import "github.com/mmcloughlin/avo/internal/inst" +import ( + "sort" + + "github.com/mmcloughlin/avo/internal/inst" +) // sets of extra instructions. var sets = [][]*inst.Instruction{ @@ -12,6 +16,7 @@ var sets = [][]*inst.Instruction{ vpclmulqdq, vpopcntdq, bitalg, + vbmi2, } // Instructions returns a list of extras to add to the instructions database. @@ -34,5 +39,15 @@ func Instructions() []*inst.Instruction { is = append(is, &c) } } + + // Sort ISA lists. Similarly, this facilitates sharing helper functions for + // building forms lists without worrying about whether the ISA list is in + // the right order. + for _, i := range is { + for idx := range i.Forms { + sort.Strings(i.Forms[idx].ISA) + } + } + return is } diff --git a/internal/opcodesextra/vbmi2.go b/internal/opcodesextra/vbmi2.go new file mode 100644 index 0000000..747bfb8 --- /dev/null +++ b/internal/opcodesextra/vbmi2.go @@ -0,0 +1,433 @@ +package opcodesextra + +import ( + "github.com/mmcloughlin/avo/internal/inst" +) + +// vbmi2 is the "Vector Bit Manipulation Instructions 2" instruction set. +var vbmi2 = []*inst.Instruction{ + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3026-L3030 + // + // {as: AVPCOMPRESSB, ytab: _yvcompresspd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63, + // avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63, + // avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63, + // }}, + // + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3041-L3045 + // + // {as: AVPCOMPRESSW, ytab: _yvcompresspd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63, + // }}, + // + { + Opcode: "VPCOMPRESSB", + Summary: "Store Sparse Packed Byte Integer Values into Dense Memory/Register", + Forms: vpcompressb, + }, + { + Opcode: "VPCOMPRESSW", + Summary: "Store Sparse Packed Word Integer Values into Dense Memory/Register", + Forms: vpcompressb, + }, + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3200-L3204 + // + // {as: AVPEXPANDB, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62, + // avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62, + // avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62, + // }}, + // + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3215-L3219 + // + // {as: AVPEXPANDW, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62, + // }}, + // + { + Opcode: "VPEXPANDB", + Summary: "Load Sparse Packed Byte Integer Values from Dense Memory/Register", + Forms: vpexpandb, + }, + { + Opcode: "VPEXPANDW", + Summary: "Load Sparse Packed Word Integer Values from Dense Memory/Register", + Forms: vpexpandb, + }, + // Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3837-L3896 + // + // {as: AVPSHLDD, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x71, + // avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x71, + // avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x71, + // }}, + // {as: AVPSHLDQ, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x71, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x71, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x71, + // }}, + // {as: AVPSHLDVD, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x71, + // avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x71, + // avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x71, + // }}, + // {as: AVPSHLDVQ, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x71, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x71, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x71, + // }}, + // {as: AVPSHLDVW, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexZeroingEnabled, 0x70, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexZeroingEnabled, 0x70, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexZeroingEnabled, 0x70, + // }}, + // {as: AVPSHLDW, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexZeroingEnabled, 0x70, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexZeroingEnabled, 0x70, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexZeroingEnabled, 0x70, + // }}, + // {as: AVPSHRDD, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x73, + // avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x73, + // avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x73, + // }}, + // {as: AVPSHRDQ, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x73, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x73, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x73, + // }}, + // {as: AVPSHRDVD, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x73, + // avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x73, + // avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x73, + // }}, + // {as: AVPSHRDVQ, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x73, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x73, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x73, + // }}, + // {as: AVPSHRDVW, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexZeroingEnabled, 0x72, + // avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexZeroingEnabled, 0x72, + // avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexZeroingEnabled, 0x72, + // }}, + // {as: AVPSHRDW, ytab: _yvalignd, prefix: Pavx, op: opBytes{ + // avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexZeroingEnabled, 0x72, + // avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexZeroingEnabled, 0x72, + // avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexZeroingEnabled, 0x72, + // }}, + // + { + Opcode: "VPSHLDW", + Summary: "Concatenate Words and Shift Packed Data Left Logical", + Forms: vpshld(""), + }, + { + Opcode: "VPSHLDD", + Summary: "Concatenate Dwords and Shift Packed Data Left Logical", + Forms: vpshld("/m32bcst"), + }, + { + Opcode: "VPSHLDQ", + Summary: "Concatenate Quadwords and Shift Packed Data Left Logical", + Forms: vpshld("/m64bcst"), + }, + { + Opcode: "VPSHRDW", + Summary: "Concatenate Words and Shift Packed Data Right Logical", + Forms: vpshld(""), + }, + { + Opcode: "VPSHRDD", + Summary: "Concatenate Dwords and Shift Packed Data Right Logical", + Forms: vpshld("/m32bcst"), + }, + { + Opcode: "VPSHRDQ", + Summary: "Concatenate Quadwords and Shift Packed Data Right Logical", + Forms: vpshld("/m64bcst"), + }, + { + Opcode: "VPSHLDVW", + Summary: "Concatenate Words and Variable Shift Packed Data Left Logical", + Forms: vpshldv(""), + }, + { + Opcode: "VPSHLDVD", + Summary: "Concatenate Dwords and Variable Shift Packed Data Left Logical", + Forms: vpshldv("/m32bcst"), + }, + { + Opcode: "VPSHLDVQ", + Summary: "Concatenate Quadwords and Variable Shift Packed Data Left Logical", + Forms: vpshldv("/m64bcst"), + }, + { + Opcode: "VPSHRDVW", + Summary: "Concatenate Words and Variable Shift Packed Data Right Logical", + Forms: vpshldv(""), + }, + { + Opcode: "VPSHRDVD", + Summary: "Concatenate Dwords and Variable Shift Packed Data Right Logical", + Forms: vpshldv("/m32bcst"), + }, + { + Opcode: "VPSHRDVQ", + Summary: "Concatenate Quadwords and Variable Shift Packed Data Right Logical", + Forms: vpshldv("/m64bcst"), + }, +} + +// VPCOMPRESSB and VPCOMPRESSW forms. +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L240-L247 +// +// var _yvcompresspd = []ytab{ +// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{YxrEvex, YxmEvex}}, +// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{YxrEvex, Yknot0, YxmEvex}}, +// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{YyrEvex, YymEvex}}, +// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{YyrEvex, Yknot0, YymEvex}}, +// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{Yzr, Yzm}}, +// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{Yzr, Yknot0, Yzm}}, +// } +var vpcompressb = inst.Forms{ + // EVEX.128.66.0F38.W0 63 /r VPCOMPRESSB m128{k1}, xmm1 A V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "m128{k}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.128.66.0F38.W0 63 /r VPCOMPRESSB xmm1{k1}{z}, xmm2 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F38.W0 63 /r VPCOMPRESSB m256{k1}, ymm1 A V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "m256{k}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F38.W0 63 /r VPCOMPRESSB ymm1{k1}{z}, ymm2 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F38.W0 63 /r VPCOMPRESSB m512{k1}, zmm1 A V/V AVX512_VBMI2 + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "zmm", Action: inst.R}, + {Type: "m512{k}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F38.W0 63 /r VPCOMPRESSB zmm1{k1}{z}, zmm2 B V/V AVX512_VBMI2 + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, +} + +// VPEXPANDB and VPEXPANDW forms. +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L376-L383 +// +// var _yvexpandpd = []ytab{ +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YxmEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YymEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}}, +// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}}, +// } +var vpexpandb = _yvexpandpd("AVX512VBMI2", "") + +// VPSH{L,R}D{W,D,Q} forms. +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L128-L135 +// +// var _yvalignd = []ytab{ +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YxmEvex, YxrEvex, YxrEvex}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YxmEvex, YxrEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YymEvex, YyrEvex, YyrEvex}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YymEvex, YyrEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, Yzm, Yzr, Yzr}}, +// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, Yzm, Yzr, Yknot0, Yzr}}, +// } +func vpshld(bcst string) inst.Forms { + return inst.Forms{ + // EVEX.128.66.0F3A.W1 70 /r /ib VPSHLDW xmm1{k1}{z}, xmm2, xmm3/m128, imm8 A V/V AVX512_VBMI2 AVX512VL + // EVEX.128.66.0F3A.W0 71 /r /ib VPSHLDD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst, imm8 B V/V AVX512_VBMI2 AVX512VL + // EVEX.128.66.0F3A.W1 71 /r /ib VPSHLDQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst, imm8 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "m128" + bcst, Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F3A.W1 70 /r /ib VPSHLDW ymm1{k1}{z}, ymm2, ymm3/m256, imm8 A V/V AVX512_VBMI2 AVX512VL + // EVEX.256.66.0F3A.W0 71 /r /ib VPSHLDD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst, imm8 B V/V AVX512_VBMI2 AVX512VL + // EVEX.256.66.0F3A.W1 71 /r /ib VPSHLDQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst, imm8 B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "m256" + bcst, Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F3A.W1 70 /r /ib VPSHLDW zmm1{k1}{z}, zmm2, zmm3/m512, imm8 A V/V AVX512_VBMI2 + // EVEX.512.66.0F3A.W0 71 /r /ib VPSHLDD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst, imm8 B V/V AVX512_VBMI2 + // EVEX.512.66.0F3A.W1 71 /r /ib VPSHLDQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst, imm8 B V/V AVX512_VBMI2 + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "imm8"}, + {Type: "m512" + bcst, Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + } +} + +// VPSH{L,R}DV{W,D,Q} forms. +// +// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L148-L155 +// +// var _yvblendmpd = []ytab{ +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex, YxrEvex}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YxmEvex, YxrEvex, Yknot0, YxrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex, YyrEvex}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YymEvex, YyrEvex, Yknot0, YyrEvex}}, +// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}}, +// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}}, +// } +func vpshldv(bcst string) inst.Forms { + return inst.Forms{ + // EVEX.128.66.0F38.W1 70 /r VPSHLDVW xmm1{k1}{z}, xmm2, xmm3/m128 A V/V AVX512_VBMI2 AVX512VL + // EVEX.128.66.0F38.W0 71 /r VPSHLDVD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst B V/V AVX512_VBMI2 AVX512VL + // EVEX.128.66.0F38.W1 71 /r VPSHLDVQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "xmm", Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "m128" + bcst, Action: inst.R}, + {Type: "xmm", Action: inst.R}, + {Type: "xmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.256.66.0F38.W1 70 /r VPSHLDVW ymm1{k1}{z}, ymm2, ymm3/m256 A V/V AVX512_VBMI2 AVX512VL + // EVEX.256.66.0F38.W0 71 /r VPSHLDVD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst B V/V AVX512_VBMI2 AVX512VL + // EVEX.256.66.0F38.W1 71 /r VPSHLDVQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst B V/V AVX512_VBMI2 AVX512VL + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "ymm", Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2", "AVX512VL"}, + Operands: []inst.Operand{ + {Type: "m256" + bcst, Action: inst.R}, + {Type: "ymm", Action: inst.R}, + {Type: "ymm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + // EVEX.512.66.0F38.W1 70 /r VPSHLDVW zmm1{k1}{z}, zmm2, zmm3/m512 A V/V AVX512_VBMI2 + // EVEX.512.66.0F38.W0 71 /r VPSHLDVD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst B V/V AVX512_VBMI2 + // EVEX.512.66.0F38.W1 71 /r VPSHLDVQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst B V/V AVX512_VBMI2 + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "zmm", Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + { + ISA: []string{"AVX512VBMI2"}, + Operands: []inst.Operand{ + {Type: "m512" + bcst, Action: inst.R}, + {Type: "zmm", Action: inst.R}, + {Type: "zmm{k}{z}", Action: inst.W}, + }, + EncodingType: inst.EncodingTypeEVEX, + }, + } +} diff --git a/internal/opcodesextra/vpopcntdq.go b/internal/opcodesextra/vpopcntdq.go index 7183701..ca3b5d5 100644 --- a/internal/opcodesextra/vpopcntdq.go +++ b/internal/opcodesextra/vpopcntdq.go @@ -23,12 +23,12 @@ var vpopcntdq = []*inst.Instruction{ { Opcode: "VPOPCNTD", Summary: "Packed Population Count for Doubleword Integers", - Forms: vpopcntdqforms("m32bcst"), + Forms: vpopcntdqforms("/m32bcst"), }, { Opcode: "VPOPCNTQ", Summary: "Packed Population Count for Quadword Integers", - Forms: vpopcntdqforms("m64bcst"), + Forms: vpopcntdqforms("/m64bcst"), }, } @@ -46,61 +46,4 @@ var vpopcntdq = []*inst.Instruction{ // {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}}, // {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}}, // } -func vpopcntdqforms(mbcst string) inst.Forms { - return inst.Forms{ - // EVEX.128.66.0F38.W0 55 /r VPOPCNTD xmm1{k1}{z}, xmm2/m128/m32bcst - // EVEX.128.66.0F38.W1 55 /r VPOPCNTQ xmm1{k1}{z}, xmm2/m128/m64bcst - { - ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "m128/" + mbcst, Action: inst.R}, - {Type: "xmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "xmm", Action: inst.R}, - {Type: "xmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - // EVEX.256.66.0F38.W0 55 /r VPOPCNTD ymm1{k1}{z}, ymm2/m256/m32bcst - // EVEX.256.66.0F38.W1 55 /r VPOPCNTQ ymm1{k1}{z}, ymm2/m256/m64bcst - { - ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "m256/" + mbcst, Action: inst.R}, - {Type: "ymm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "ymm", Action: inst.R}, - {Type: "ymm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - // EVEX.512.66.0F38.W0 55 /r VPOPCNTD zmm1{k1}{z}, zmm2/m512/m32bcst - // EVEX.512.66.0F38.W1 55 /r VPOPCNTQ zmm1{k1}{z}, zmm2/m512/m64bcst - { - ISA: []string{"AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "m512/" + mbcst, Action: inst.R}, - {Type: "zmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - { - ISA: []string{"AVX512VPOPCNTDQ"}, - Operands: []inst.Operand{ - {Type: "zmm", Action: inst.R}, - {Type: "zmm{k}{z}", Action: inst.W}, - }, - EncodingType: inst.EncodingTypeEVEX, - }, - } -} +func vpopcntdqforms(bcst string) inst.Forms { return _yvexpandpd("AVX512VPOPCNTDQ", bcst) } diff --git a/x86/zctors.go b/x86/zctors.go index f4d6992..3d2debc 100644 --- a/x86/zctors.go +++ b/x86/zctors.go @@ -26265,6 +26265,37 @@ func VPCMPW(ops ...operand.Op) (*intrep.Instruction, error) { return build(opcVPCMPW.Forms(), sffxs{}, ops) } +// VPCOMPRESSB: Store Sparse Packed Byte Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSB xmm k m128 +// VPCOMPRESSB xmm k xmm +// VPCOMPRESSB xmm m128 +// VPCOMPRESSB xmm xmm +// VPCOMPRESSB ymm k m256 +// VPCOMPRESSB ymm k ymm +// VPCOMPRESSB ymm m256 +// VPCOMPRESSB ymm ymm +// VPCOMPRESSB zmm k m512 +// VPCOMPRESSB zmm k zmm +// VPCOMPRESSB zmm m512 +// VPCOMPRESSB zmm zmm +func VPCOMPRESSB(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPCOMPRESSB.Forms(), sffxs{}, ops) +} + +// VPCOMPRESSB_Z: Store Sparse Packed Byte Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSB.Z xmm k xmm +// VPCOMPRESSB.Z ymm k ymm +// VPCOMPRESSB.Z zmm k zmm +func VPCOMPRESSB_Z(xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPCOMPRESSB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, xyz1}) +} + // VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register. // // Forms: @@ -26333,6 +26364,37 @@ func VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) { return build(opcVPCOMPRESSQ.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz}) } +// VPCOMPRESSW: Store Sparse Packed Word Integer Values into Dense Memory/Register. +// +// Forms: +// +// VPCOMPRESSW xmm k m128 +// VPCOMPRESSW xmm k xmm +// VPCOMPRESSW xmm m128 +// VPCOMPRESSW xmm xmm +// VPCOMPRESSW ymm k m256 +// VPCOMPRESSW ymm k ymm +// VPCOMPRESSW ymm m256 +// VPCOMPRESSW ymm ymm +// VPCOMPRESSW zmm k m512 +// VPCOMPRESSW zmm k zmm +// VPCOMPRESSW zmm m512 +// VPCOMPRESSW zmm zmm +func VPCOMPRESSW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPCOMPRESSW.Forms(), sffxs{}, ops) +} + +// VPCOMPRESSW_Z: Store Sparse Packed Word Integer Values into Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPCOMPRESSW.Z xmm k xmm +// VPCOMPRESSW.Z ymm k ymm +// VPCOMPRESSW.Z zmm k zmm +func VPCOMPRESSW_Z(xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPCOMPRESSW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, xyz1}) +} + // VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register. // // Forms: @@ -27791,6 +27853,40 @@ func VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { return build(opcVPERMW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) } +// VPEXPANDB: Load Sparse Packed Byte Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDB m128 k xmm +// VPEXPANDB m128 xmm +// VPEXPANDB m256 k ymm +// VPEXPANDB m256 ymm +// VPEXPANDB xmm k xmm +// VPEXPANDB xmm xmm +// VPEXPANDB ymm k ymm +// VPEXPANDB ymm ymm +// VPEXPANDB m512 k zmm +// VPEXPANDB m512 zmm +// VPEXPANDB zmm k zmm +// VPEXPANDB zmm zmm +func VPEXPANDB(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPEXPANDB.Forms(), sffxs{}, ops) +} + +// VPEXPANDB_Z: Load Sparse Packed Byte Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDB.Z m128 k xmm +// VPEXPANDB.Z m256 k ymm +// VPEXPANDB.Z xmm k xmm +// VPEXPANDB.Z ymm k ymm +// VPEXPANDB.Z m512 k zmm +// VPEXPANDB.Z zmm k zmm +func VPEXPANDB_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) { + return build(opcVPEXPANDB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz}) +} + // VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register. // // Forms: @@ -27859,6 +27955,40 @@ func VPEXPANDQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) { return build(opcVPEXPANDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz}) } +// VPEXPANDW: Load Sparse Packed Word Integer Values from Dense Memory/Register. +// +// Forms: +// +// VPEXPANDW m128 k xmm +// VPEXPANDW m128 xmm +// VPEXPANDW m256 k ymm +// VPEXPANDW m256 ymm +// VPEXPANDW xmm k xmm +// VPEXPANDW xmm xmm +// VPEXPANDW ymm k ymm +// VPEXPANDW ymm ymm +// VPEXPANDW m512 k zmm +// VPEXPANDW m512 zmm +// VPEXPANDW zmm k zmm +// VPEXPANDW zmm zmm +func VPEXPANDW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPEXPANDW.Forms(), sffxs{}, ops) +} + +// VPEXPANDW_Z: Load Sparse Packed Word Integer Values from Dense Memory/Register (Zeroing Masking). +// +// Forms: +// +// VPEXPANDW.Z m128 k xmm +// VPEXPANDW.Z m256 k ymm +// VPEXPANDW.Z xmm k xmm +// VPEXPANDW.Z ymm k ymm +// VPEXPANDW.Z m512 k zmm +// VPEXPANDW.Z zmm k zmm +func VPEXPANDW_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) { + return build(opcVPEXPANDW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz}) +} + // VPEXTRB: Extract Byte. // // Forms: @@ -31540,6 +31670,614 @@ func VPSCATTERQQ(xyz, k, v operand.Op) (*intrep.Instruction, error) { return build(opcVPSCATTERQQ.Forms(), sffxs{}, []operand.Op{xyz, k, v}) } +// VPSHLDD: Concatenate Dwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDD imm8 m128 xmm k xmm +// VPSHLDD imm8 m128 xmm xmm +// VPSHLDD imm8 m256 ymm k ymm +// VPSHLDD imm8 m256 ymm ymm +// VPSHLDD imm8 xmm xmm k xmm +// VPSHLDD imm8 xmm xmm xmm +// VPSHLDD imm8 ymm ymm k ymm +// VPSHLDD imm8 ymm ymm ymm +// VPSHLDD imm8 m512 zmm k zmm +// VPSHLDD imm8 m512 zmm zmm +// VPSHLDD imm8 zmm zmm k zmm +// VPSHLDD imm8 zmm zmm zmm +func VPSHLDD(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDD.Forms(), sffxs{}, ops) +} + +// VPSHLDD_BCST: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDD.BCST imm8 m32 xmm k xmm +// VPSHLDD.BCST imm8 m32 xmm xmm +// VPSHLDD.BCST imm8 m32 ymm k ymm +// VPSHLDD.BCST imm8 m32 ymm ymm +// VPSHLDD.BCST imm8 m32 zmm k zmm +// VPSHLDD.BCST imm8 m32 zmm zmm +func VPSHLDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDD.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHLDD_BCST_Z: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDD.BCST.Z imm8 m32 xmm k xmm +// VPSHLDD.BCST.Z imm8 m32 ymm k ymm +// VPSHLDD.BCST.Z imm8 m32 zmm k zmm +func VPSHLDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VPSHLDD_Z: Concatenate Dwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDD.Z imm8 m128 xmm k xmm +// VPSHLDD.Z imm8 m256 ymm k ymm +// VPSHLDD.Z imm8 xmm xmm k xmm +// VPSHLDD.Z imm8 ymm ymm k ymm +// VPSHLDD.Z imm8 m512 zmm k zmm +// VPSHLDD.Z imm8 zmm zmm k zmm +func VPSHLDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VPSHLDQ: Concatenate Quadwords and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDQ imm8 m128 xmm k xmm +// VPSHLDQ imm8 m128 xmm xmm +// VPSHLDQ imm8 m256 ymm k ymm +// VPSHLDQ imm8 m256 ymm ymm +// VPSHLDQ imm8 xmm xmm k xmm +// VPSHLDQ imm8 xmm xmm xmm +// VPSHLDQ imm8 ymm ymm k ymm +// VPSHLDQ imm8 ymm ymm ymm +// VPSHLDQ imm8 m512 zmm k zmm +// VPSHLDQ imm8 m512 zmm zmm +// VPSHLDQ imm8 zmm zmm k zmm +// VPSHLDQ imm8 zmm zmm zmm +func VPSHLDQ(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDQ.Forms(), sffxs{}, ops) +} + +// VPSHLDQ_BCST: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDQ.BCST imm8 m64 xmm k xmm +// VPSHLDQ.BCST imm8 m64 xmm xmm +// VPSHLDQ.BCST imm8 m64 ymm k ymm +// VPSHLDQ.BCST imm8 m64 ymm ymm +// VPSHLDQ.BCST imm8 m64 zmm k zmm +// VPSHLDQ.BCST imm8 m64 zmm zmm +func VPSHLDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDQ.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHLDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHLDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHLDQ.BCST.Z imm8 m64 zmm k zmm +func VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VPSHLDQ_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDQ.Z imm8 m128 xmm k xmm +// VPSHLDQ.Z imm8 m256 ymm k ymm +// VPSHLDQ.Z imm8 xmm xmm k xmm +// VPSHLDQ.Z imm8 ymm ymm k ymm +// VPSHLDQ.Z imm8 m512 zmm k zmm +// VPSHLDQ.Z imm8 zmm zmm k zmm +func VPSHLDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VPSHLDVD: Concatenate Dwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVD m128 xmm k xmm +// VPSHLDVD m128 xmm xmm +// VPSHLDVD m256 ymm k ymm +// VPSHLDVD m256 ymm ymm +// VPSHLDVD xmm xmm k xmm +// VPSHLDVD xmm xmm xmm +// VPSHLDVD ymm ymm k ymm +// VPSHLDVD ymm ymm ymm +// VPSHLDVD m512 zmm k zmm +// VPSHLDVD m512 zmm zmm +// VPSHLDVD zmm zmm k zmm +// VPSHLDVD zmm zmm zmm +func VPSHLDVD(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVD.Forms(), sffxs{}, ops) +} + +// VPSHLDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVD.BCST m32 xmm k xmm +// VPSHLDVD.BCST m32 xmm xmm +// VPSHLDVD.BCST m32 ymm k ymm +// VPSHLDVD.BCST m32 ymm ymm +// VPSHLDVD.BCST m32 zmm k zmm +// VPSHLDVD.BCST m32 zmm zmm +func VPSHLDVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVD.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHLDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.BCST.Z m32 xmm k xmm +// VPSHLDVD.BCST.Z m32 ymm k ymm +// VPSHLDVD.BCST.Z m32 zmm k zmm +func VPSHLDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1}) +} + +// VPSHLDVD_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVD.Z m128 xmm k xmm +// VPSHLDVD.Z m256 ymm k ymm +// VPSHLDVD.Z xmm xmm k xmm +// VPSHLDVD.Z ymm ymm k ymm +// VPSHLDVD.Z m512 zmm k zmm +// VPSHLDVD.Z zmm zmm k zmm +func VPSHLDVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHLDVQ: Concatenate Quadwords and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVQ m128 xmm k xmm +// VPSHLDVQ m128 xmm xmm +// VPSHLDVQ m256 ymm k ymm +// VPSHLDVQ m256 ymm ymm +// VPSHLDVQ xmm xmm k xmm +// VPSHLDVQ xmm xmm xmm +// VPSHLDVQ ymm ymm k ymm +// VPSHLDVQ ymm ymm ymm +// VPSHLDVQ m512 zmm k zmm +// VPSHLDVQ m512 zmm zmm +// VPSHLDVQ zmm zmm k zmm +// VPSHLDVQ zmm zmm zmm +func VPSHLDVQ(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVQ.Forms(), sffxs{}, ops) +} + +// VPSHLDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast). +// +// Forms: +// +// VPSHLDVQ.BCST m64 xmm k xmm +// VPSHLDVQ.BCST m64 xmm xmm +// VPSHLDVQ.BCST m64 ymm k ymm +// VPSHLDVQ.BCST m64 ymm ymm +// VPSHLDVQ.BCST m64 zmm k zmm +// VPSHLDVQ.BCST m64 zmm zmm +func VPSHLDVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVQ.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHLDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.BCST.Z m64 xmm k xmm +// VPSHLDVQ.BCST.Z m64 ymm k ymm +// VPSHLDVQ.BCST.Z m64 zmm k zmm +func VPSHLDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1}) +} + +// VPSHLDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVQ.Z m128 xmm k xmm +// VPSHLDVQ.Z m256 ymm k ymm +// VPSHLDVQ.Z xmm xmm k xmm +// VPSHLDVQ.Z ymm ymm k ymm +// VPSHLDVQ.Z m512 zmm k zmm +// VPSHLDVQ.Z zmm zmm k zmm +func VPSHLDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHLDVW: Concatenate Words and Variable Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDVW m128 xmm k xmm +// VPSHLDVW m128 xmm xmm +// VPSHLDVW m256 ymm k ymm +// VPSHLDVW m256 ymm ymm +// VPSHLDVW xmm xmm k xmm +// VPSHLDVW xmm xmm xmm +// VPSHLDVW ymm ymm k ymm +// VPSHLDVW ymm ymm ymm +// VPSHLDVW m512 zmm k zmm +// VPSHLDVW m512 zmm zmm +// VPSHLDVW zmm zmm k zmm +// VPSHLDVW zmm zmm zmm +func VPSHLDVW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVW.Forms(), sffxs{}, ops) +} + +// VPSHLDVW_Z: Concatenate Words and Variable Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDVW.Z m128 xmm k xmm +// VPSHLDVW.Z m256 ymm k ymm +// VPSHLDVW.Z xmm xmm k xmm +// VPSHLDVW.Z ymm ymm k ymm +// VPSHLDVW.Z m512 zmm k zmm +// VPSHLDVW.Z zmm zmm k zmm +func VPSHLDVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHLDW: Concatenate Words and Shift Packed Data Left Logical. +// +// Forms: +// +// VPSHLDW imm8 m128 xmm k xmm +// VPSHLDW imm8 m128 xmm xmm +// VPSHLDW imm8 m256 ymm k ymm +// VPSHLDW imm8 m256 ymm ymm +// VPSHLDW imm8 xmm xmm k xmm +// VPSHLDW imm8 xmm xmm xmm +// VPSHLDW imm8 ymm ymm k ymm +// VPSHLDW imm8 ymm ymm ymm +// VPSHLDW imm8 m512 zmm k zmm +// VPSHLDW imm8 m512 zmm zmm +// VPSHLDW imm8 zmm zmm k zmm +// VPSHLDW imm8 zmm zmm zmm +func VPSHLDW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDW.Forms(), sffxs{}, ops) +} + +// VPSHLDW_Z: Concatenate Words and Shift Packed Data Left Logical (Zeroing Masking). +// +// Forms: +// +// VPSHLDW.Z imm8 m128 xmm k xmm +// VPSHLDW.Z imm8 m256 ymm k ymm +// VPSHLDW.Z imm8 xmm xmm k xmm +// VPSHLDW.Z imm8 ymm ymm k ymm +// VPSHLDW.Z imm8 m512 zmm k zmm +// VPSHLDW.Z imm8 zmm zmm k zmm +func VPSHLDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHLDW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VPSHRDD: Concatenate Dwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDD imm8 m128 xmm k xmm +// VPSHRDD imm8 m128 xmm xmm +// VPSHRDD imm8 m256 ymm k ymm +// VPSHRDD imm8 m256 ymm ymm +// VPSHRDD imm8 xmm xmm k xmm +// VPSHRDD imm8 xmm xmm xmm +// VPSHRDD imm8 ymm ymm k ymm +// VPSHRDD imm8 ymm ymm ymm +// VPSHRDD imm8 m512 zmm k zmm +// VPSHRDD imm8 m512 zmm zmm +// VPSHRDD imm8 zmm zmm k zmm +// VPSHRDD imm8 zmm zmm zmm +func VPSHRDD(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDD.Forms(), sffxs{}, ops) +} + +// VPSHRDD_BCST: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDD.BCST imm8 m32 xmm k xmm +// VPSHRDD.BCST imm8 m32 xmm xmm +// VPSHRDD.BCST imm8 m32 ymm k ymm +// VPSHRDD.BCST imm8 m32 ymm ymm +// VPSHRDD.BCST imm8 m32 zmm k zmm +// VPSHRDD.BCST imm8 m32 zmm zmm +func VPSHRDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDD.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHRDD_BCST_Z: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDD.BCST.Z imm8 m32 xmm k xmm +// VPSHRDD.BCST.Z imm8 m32 ymm k ymm +// VPSHRDD.BCST.Z imm8 m32 zmm k zmm +func VPSHRDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VPSHRDD_Z: Concatenate Dwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDD.Z imm8 m128 xmm k xmm +// VPSHRDD.Z imm8 m256 ymm k ymm +// VPSHRDD.Z imm8 xmm xmm k xmm +// VPSHRDD.Z imm8 ymm ymm k ymm +// VPSHRDD.Z imm8 m512 zmm k zmm +// VPSHRDD.Z imm8 zmm zmm k zmm +func VPSHRDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VPSHRDQ: Concatenate Quadwords and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDQ imm8 m128 xmm k xmm +// VPSHRDQ imm8 m128 xmm xmm +// VPSHRDQ imm8 m256 ymm k ymm +// VPSHRDQ imm8 m256 ymm ymm +// VPSHRDQ imm8 xmm xmm k xmm +// VPSHRDQ imm8 xmm xmm xmm +// VPSHRDQ imm8 ymm ymm k ymm +// VPSHRDQ imm8 ymm ymm ymm +// VPSHRDQ imm8 m512 zmm k zmm +// VPSHRDQ imm8 m512 zmm zmm +// VPSHRDQ imm8 zmm zmm k zmm +// VPSHRDQ imm8 zmm zmm zmm +func VPSHRDQ(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDQ.Forms(), sffxs{}, ops) +} + +// VPSHRDQ_BCST: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDQ.BCST imm8 m64 xmm k xmm +// VPSHRDQ.BCST imm8 m64 xmm xmm +// VPSHRDQ.BCST imm8 m64 ymm k ymm +// VPSHRDQ.BCST imm8 m64 ymm ymm +// VPSHRDQ.BCST imm8 m64 zmm k zmm +// VPSHRDQ.BCST imm8 m64 zmm zmm +func VPSHRDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDQ.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHRDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.BCST.Z imm8 m64 xmm k xmm +// VPSHRDQ.BCST.Z imm8 m64 ymm k ymm +// VPSHRDQ.BCST.Z imm8 m64 zmm k zmm +func VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1}) +} + +// VPSHRDQ_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDQ.Z imm8 m128 xmm k xmm +// VPSHRDQ.Z imm8 m256 ymm k ymm +// VPSHRDQ.Z imm8 xmm xmm k xmm +// VPSHRDQ.Z imm8 ymm ymm k ymm +// VPSHRDQ.Z imm8 m512 zmm k zmm +// VPSHRDQ.Z imm8 zmm zmm k zmm +func VPSHRDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + +// VPSHRDVD: Concatenate Dwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVD m128 xmm k xmm +// VPSHRDVD m128 xmm xmm +// VPSHRDVD m256 ymm k ymm +// VPSHRDVD m256 ymm ymm +// VPSHRDVD xmm xmm k xmm +// VPSHRDVD xmm xmm xmm +// VPSHRDVD ymm ymm k ymm +// VPSHRDVD ymm ymm ymm +// VPSHRDVD m512 zmm k zmm +// VPSHRDVD m512 zmm zmm +// VPSHRDVD zmm zmm k zmm +// VPSHRDVD zmm zmm zmm +func VPSHRDVD(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVD.Forms(), sffxs{}, ops) +} + +// VPSHRDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVD.BCST m32 xmm k xmm +// VPSHRDVD.BCST m32 xmm xmm +// VPSHRDVD.BCST m32 ymm k ymm +// VPSHRDVD.BCST m32 ymm ymm +// VPSHRDVD.BCST m32 zmm k zmm +// VPSHRDVD.BCST m32 zmm zmm +func VPSHRDVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVD.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHRDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.BCST.Z m32 xmm k xmm +// VPSHRDVD.BCST.Z m32 ymm k ymm +// VPSHRDVD.BCST.Z m32 zmm k zmm +func VPSHRDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1}) +} + +// VPSHRDVD_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVD.Z m128 xmm k xmm +// VPSHRDVD.Z m256 ymm k ymm +// VPSHRDVD.Z xmm xmm k xmm +// VPSHRDVD.Z ymm ymm k ymm +// VPSHRDVD.Z m512 zmm k zmm +// VPSHRDVD.Z zmm zmm k zmm +func VPSHRDVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHRDVQ: Concatenate Quadwords and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVQ m128 xmm k xmm +// VPSHRDVQ m128 xmm xmm +// VPSHRDVQ m256 ymm k ymm +// VPSHRDVQ m256 ymm ymm +// VPSHRDVQ xmm xmm k xmm +// VPSHRDVQ xmm xmm xmm +// VPSHRDVQ ymm ymm k ymm +// VPSHRDVQ ymm ymm ymm +// VPSHRDVQ m512 zmm k zmm +// VPSHRDVQ m512 zmm zmm +// VPSHRDVQ zmm zmm k zmm +// VPSHRDVQ zmm zmm zmm +func VPSHRDVQ(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVQ.Forms(), sffxs{}, ops) +} + +// VPSHRDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast). +// +// Forms: +// +// VPSHRDVQ.BCST m64 xmm k xmm +// VPSHRDVQ.BCST m64 xmm xmm +// VPSHRDVQ.BCST m64 ymm k ymm +// VPSHRDVQ.BCST m64 ymm ymm +// VPSHRDVQ.BCST m64 zmm k zmm +// VPSHRDVQ.BCST m64 zmm zmm +func VPSHRDVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVQ.Forms(), sffxs{sffxBCST}, ops) +} + +// VPSHRDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.BCST.Z m64 xmm k xmm +// VPSHRDVQ.BCST.Z m64 ymm k ymm +// VPSHRDVQ.BCST.Z m64 zmm k zmm +func VPSHRDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1}) +} + +// VPSHRDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVQ.Z m128 xmm k xmm +// VPSHRDVQ.Z m256 ymm k ymm +// VPSHRDVQ.Z xmm xmm k xmm +// VPSHRDVQ.Z ymm ymm k ymm +// VPSHRDVQ.Z m512 zmm k zmm +// VPSHRDVQ.Z zmm zmm k zmm +func VPSHRDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHRDVW: Concatenate Words and Variable Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDVW m128 xmm k xmm +// VPSHRDVW m128 xmm xmm +// VPSHRDVW m256 ymm k ymm +// VPSHRDVW m256 ymm ymm +// VPSHRDVW xmm xmm k xmm +// VPSHRDVW xmm xmm xmm +// VPSHRDVW ymm ymm k ymm +// VPSHRDVW ymm ymm ymm +// VPSHRDVW m512 zmm k zmm +// VPSHRDVW m512 zmm zmm +// VPSHRDVW zmm zmm k zmm +// VPSHRDVW zmm zmm zmm +func VPSHRDVW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVW.Forms(), sffxs{}, ops) +} + +// VPSHRDVW_Z: Concatenate Words and Variable Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDVW.Z m128 xmm k xmm +// VPSHRDVW.Z m256 ymm k ymm +// VPSHRDVW.Z xmm xmm k xmm +// VPSHRDVW.Z ymm ymm k ymm +// VPSHRDVW.Z m512 zmm k zmm +// VPSHRDVW.Z zmm zmm k zmm +func VPSHRDVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1}) +} + +// VPSHRDW: Concatenate Words and Shift Packed Data Right Logical. +// +// Forms: +// +// VPSHRDW imm8 m128 xmm k xmm +// VPSHRDW imm8 m128 xmm xmm +// VPSHRDW imm8 m256 ymm k ymm +// VPSHRDW imm8 m256 ymm ymm +// VPSHRDW imm8 xmm xmm k xmm +// VPSHRDW imm8 xmm xmm xmm +// VPSHRDW imm8 ymm ymm k ymm +// VPSHRDW imm8 ymm ymm ymm +// VPSHRDW imm8 m512 zmm k zmm +// VPSHRDW imm8 m512 zmm zmm +// VPSHRDW imm8 zmm zmm k zmm +// VPSHRDW imm8 zmm zmm zmm +func VPSHRDW(ops ...operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDW.Forms(), sffxs{}, ops) +} + +// VPSHRDW_Z: Concatenate Words and Shift Packed Data Right Logical (Zeroing Masking). +// +// Forms: +// +// VPSHRDW.Z imm8 m128 xmm k xmm +// VPSHRDW.Z imm8 m256 ymm k ymm +// VPSHRDW.Z imm8 xmm xmm k xmm +// VPSHRDW.Z imm8 ymm ymm k ymm +// VPSHRDW.Z imm8 m512 zmm k zmm +// VPSHRDW.Z imm8 zmm zmm k zmm +func VPSHRDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) { + return build(opcVPSHRDW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1}) +} + // VPSHUFB: Packed Shuffle Bytes. // // Forms: diff --git a/x86/zctors_test.go b/x86/zctors_test.go index 8995223..56e9def 100644 --- a/x86/zctors_test.go +++ b/x86/zctors_test.go @@ -29939,6 +29939,57 @@ func TestVPCMPWValidFormsNoError(t *testing.T) { } } +func TestVPCOMPRESSBValidFormsNoError(t *testing.T) { + if _, err := VPCOMPRESSB(opxmm, opk, opm128); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opxmm, opm128); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opymm, opk, opm256); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opymm, opm256); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opzmm, opk, opm512); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opzmm, opm512); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB(opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPCOMPRESSB_ZValidFormsNoError(t *testing.T) { + if _, err := VPCOMPRESSB_Z(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB_Z(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSB_Z(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + func TestVPCOMPRESSDValidFormsNoError(t *testing.T) { if _, err := VPCOMPRESSD(opxmm, opk, opm128); err != nil { t.Fatal(err) @@ -30059,6 +30110,57 @@ func TestVPCOMPRESSQ_ZValidFormsNoError(t *testing.T) { } } +func TestVPCOMPRESSWValidFormsNoError(t *testing.T) { + if _, err := VPCOMPRESSW(opxmm, opk, opm128); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opxmm, opm128); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opymm, opk, opm256); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opymm, opm256); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opzmm, opk, opm512); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opzmm, opm512); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW(opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPCOMPRESSW_ZValidFormsNoError(t *testing.T) { + if _, err := VPCOMPRESSW_Z(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW_Z(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPCOMPRESSW_Z(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + func TestVPCONFLICTDValidFormsNoError(t *testing.T) { if _, err := VPCONFLICTD(opm128, opk, opxmm); err != nil { t.Fatal(err) @@ -32459,6 +32561,66 @@ func TestVPERMW_ZValidFormsNoError(t *testing.T) { } } +func TestVPEXPANDBValidFormsNoError(t *testing.T) { + if _, err := VPEXPANDB(opm128, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opm128, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opm256, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opm256, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opm512, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opm512, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB(opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPEXPANDB_ZValidFormsNoError(t *testing.T) { + if _, err := VPEXPANDB_Z(opm128, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB_Z(opm256, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB_Z(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB_Z(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB_Z(opm512, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDB_Z(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + func TestVPEXPANDDValidFormsNoError(t *testing.T) { if _, err := VPEXPANDD(opm128, opk, opxmm); err != nil { t.Fatal(err) @@ -32579,6 +32741,66 @@ func TestVPEXPANDQ_ZValidFormsNoError(t *testing.T) { } } +func TestVPEXPANDWValidFormsNoError(t *testing.T) { + if _, err := VPEXPANDW(opm128, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opm128, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opm256, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opm256, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opm512, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opm512, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW(opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPEXPANDW_ZValidFormsNoError(t *testing.T) { + if _, err := VPEXPANDW_Z(opm128, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW_Z(opm256, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW_Z(opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW_Z(opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW_Z(opm512, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPEXPANDW_Z(opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + func TestVPEXTRBValidFormsNoError(t *testing.T) { if _, err := VPEXTRB(opimm8, opxmm, opm8); err != nil { t.Fatal(err) @@ -38498,6 +38720,990 @@ func TestVPSCATTERQQValidFormsNoError(t *testing.T) { } } +func TestVPSHLDDValidFormsNoError(t *testing.T) { + if _, err := VPSHLDD(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDD_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHLDD_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST(opimm8, opm32, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST(opimm8, opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST(opimm8, opm32, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST(opimm8, opm32, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDD_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDD_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDQValidFormsNoError(t *testing.T) { + if _, err := VPSHLDQ(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDQ_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHLDQ_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST(opimm8, opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST(opimm8, opm64, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST(opimm8, opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDQ_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDQ_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDQ_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDQ_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVDValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVD(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVD_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVD_BCST(opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST(opm32, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST(opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST(opm32, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST(opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST(opm32, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVD_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST_Z(opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVD_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVD_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVD_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVQValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVQ(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVQ_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVQ_BCST(opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST(opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST(opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST(opm64, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST(opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST(opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVQ_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVQ_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVQ_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVQ_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVWValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVW(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDVW_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDVW_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDVW_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDWValidFormsNoError(t *testing.T) { + if _, err := VPSHLDW(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHLDW_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHLDW_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHLDW_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDDValidFormsNoError(t *testing.T) { + if _, err := VPSHRDD(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDD_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHRDD_BCST(opimm8, opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST(opimm8, opm32, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST(opimm8, opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST(opimm8, opm32, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST(opimm8, opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST(opimm8, opm32, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDD_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST_Z(opimm8, opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_BCST_Z(opimm8, opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDD_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDD_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDD_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDQValidFormsNoError(t *testing.T) { + if _, err := VPSHRDQ(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDQ_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHRDQ_BCST(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST(opimm8, opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST(opimm8, opm64, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST(opimm8, opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDQ_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST_Z(opimm8, opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_BCST_Z(opimm8, opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDQ_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDQ_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDQ_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVDValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVD(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVD_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVD_BCST(opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST(opm32, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST(opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST(opm32, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST(opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST(opm32, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVD_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVD_BCST_Z(opm32, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST_Z(opm32, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_BCST_Z(opm32, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVD_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVD_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVD_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVQValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVQ(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVQ_BCSTValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVQ_BCST(opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST(opm64, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST(opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST(opm64, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST(opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST(opm64, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVQ_BCST_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVQ_BCST_Z(opm64, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST_Z(opm64, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_BCST_Z(opm64, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVQ_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVQ_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVQ_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVWValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVW(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW(opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDVW_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDVW_Z(opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW_Z(opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW_Z(opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW_Z(opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW_Z(opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDVW_Z(opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDWValidFormsNoError(t *testing.T) { + if _, err := VPSHRDW(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opm128, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opm256, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opxmm, opxmm, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opymm, opymm, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opm512, opzmm, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW(opimm8, opzmm, opzmm, opzmm); err != nil { + t.Fatal(err) + } +} + +func TestVPSHRDW_ZValidFormsNoError(t *testing.T) { + if _, err := VPSHRDW_Z(opimm8, opm128, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW_Z(opimm8, opm256, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW_Z(opimm8, opxmm, opxmm, opk, opxmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW_Z(opimm8, opymm, opymm, opk, opymm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW_Z(opimm8, opm512, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } + if _, err := VPSHRDW_Z(opimm8, opzmm, opzmm, opk, opzmm); err != nil { + t.Fatal(err) + } +} + func TestVPSHUFBValidFormsNoError(t *testing.T) { if _, err := VPSHUFB(opm256, opymm, opymm); err != nil { t.Fatal(err) diff --git a/x86/zoptab.go b/x86/zoptab.go index 69fa3fc..10b6bb1 100644 --- a/x86/zoptab.go +++ b/x86/zoptab.go @@ -317,6 +317,8 @@ const ( isasAVX_PCLMULQDQ isasVPCLMULQDQ isasAVX512F_VPCLMULQDQ + isasAVX512VBMI2_AVX512VL + isasAVX512VBMI2 isasAVX512VL_AVX512VNNI isasAVX512VNNI isasAVX512VBMI_AVX512VL @@ -388,6 +390,8 @@ var isaslisttable = [][]string{ {"AVX", "PCLMULQDQ"}, {"VPCLMULQDQ"}, {"AVX512F", "VPCLMULQDQ"}, + {"AVX512VBMI2", "AVX512VL"}, + {"AVX512VBMI2"}, {"AVX512VL", "AVX512VNNI"}, {"AVX512VNNI"}, {"AVX512VBMI", "AVX512VL"}, @@ -1409,8 +1413,10 @@ const ( opcVPCMPUQ opcVPCMPUW opcVPCMPW + opcVPCOMPRESSB opcVPCOMPRESSD opcVPCOMPRESSQ + opcVPCOMPRESSW opcVPCONFLICTD opcVPCONFLICTQ opcVPDPBUSD @@ -1439,8 +1445,10 @@ const ( opcVPERMT2Q opcVPERMT2W opcVPERMW + opcVPEXPANDB opcVPEXPANDD opcVPEXPANDQ + opcVPEXPANDW opcVPEXTRB opcVPEXTRD opcVPEXTRQ @@ -1552,6 +1560,18 @@ const ( opcVPSCATTERDQ opcVPSCATTERQD opcVPSCATTERQQ + opcVPSHLDD + opcVPSHLDQ + opcVPSHLDVD + opcVPSHLDVQ + opcVPSHLDVW + opcVPSHLDW + opcVPSHRDD + opcVPSHRDQ + opcVPSHRDVD + opcVPSHRDVQ + opcVPSHRDVW + opcVPSHRDW opcVPSHUFB opcVPSHUFBITQMB opcVPSHUFD @@ -2712,8 +2732,10 @@ var opcstringtable = []string{ "VPCMPUQ", "VPCMPUW", "VPCMPW", + "VPCOMPRESSB", "VPCOMPRESSD", "VPCOMPRESSQ", + "VPCOMPRESSW", "VPCONFLICTD", "VPCONFLICTQ", "VPDPBUSD", @@ -2742,8 +2764,10 @@ var opcstringtable = []string{ "VPERMT2Q", "VPERMT2W", "VPERMW", + "VPEXPANDB", "VPEXPANDD", "VPEXPANDQ", + "VPEXPANDW", "VPEXTRB", "VPEXTRD", "VPEXTRQ", @@ -2855,6 +2879,18 @@ var opcstringtable = []string{ "VPSCATTERDQ", "VPSCATTERQD", "VPSCATTERQQ", + "VPSHLDD", + "VPSHLDQ", + "VPSHLDVD", + "VPSHLDVQ", + "VPSHLDVW", + "VPSHLDW", + "VPSHRDD", + "VPSHRDQ", + "VPSHRDVD", + "VPSHRDVQ", + "VPSHRDVW", + "VPSHRDW", "VPSHUFB", "VPSHUFBITQMB", "VPSHUFD", @@ -9803,6 +9839,21 @@ var forms = []form{ {opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}}, {opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}}, {opcVPCMPW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPCOMPRESSB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPCOMPRESSB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPCOMPRESSB, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}}, + {opcVPCOMPRESSB, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionRW}}}, {opcVPCOMPRESSD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}}, {opcVPCOMPRESSD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, @@ -9839,6 +9890,21 @@ var forms = []form{ {opcVPCOMPRESSQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}}, {opcVPCOMPRESSQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM128), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPCOMPRESSW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM128), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM256), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPCOMPRESSW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeM256), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeM512), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPCOMPRESSW, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeM512), false, actionW}}}, + {opcVPCOMPRESSW, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, {opcVPCONFLICTD, sffxsclsZ, 0, isasAVX512CD_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, {opcVPCONFLICTD, sffxsclsNIL, 0, isasAVX512CD_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, @@ -10545,6 +10611,24 @@ var forms = []form{ {opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, {opcVPERMW, sffxsclsZ, 0, isasAVX512BW, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPERMW, sffxsclsNIL, 0, isasAVX512BW, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPEXPANDB, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDB, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, {opcVPEXPANDD, sffxsclsZ, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, {opcVPEXPANDD, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, @@ -10581,6 +10665,24 @@ var forms = []form{ {opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, {opcVPEXPANDQ, sffxsclsZ, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPEXPANDQ, sffxsclsNIL, 0, isasAVX512F, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPEXPANDW, sffxsclsZ, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPEXPANDW, sffxsclsNIL, 0, isasAVX512VBMI2, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPEXTRB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM8), false, actionW}}}, {opcVPEXTRB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeR32), false, actionW}}}, {opcVPEXTRD, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeM32), false, actionW}}}, @@ -12310,6 +12412,294 @@ var forms = []form{ {opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64X), false, actionW}}}, {opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Y), false, actionW}}}, {opcVPSCATTERQQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeVM64Z), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDD, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDQ, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsBCST, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVD, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsBCST, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVQ, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDVW, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHLDW, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHLDW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDD, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDQ, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsBCST, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVD, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVD, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsBCST_Z, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsBCST, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVQ, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVQ, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDVW, sffxsclsZ, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDVW, sffxsclsNIL, 0, isasAVX512VBMI2, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}}, + {opcVPSHRDW, sffxsclsZ, 0, isasAVX512VBMI2, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, + {opcVPSHRDW, sffxsclsNIL, 0, isasAVX512VBMI2, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}}, {opcVPSHUFB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, {opcVPSHUFB, sffxsclsNIL, 0, isasAVX2, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}}, {opcVPSHUFB, sffxsclsNIL, 0, isasAVX, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}}, @@ -15688,292 +16078,308 @@ var opcformstable = [][]form{ forms[6758:6776], forms[6776:6788], forms[6788:6800], - forms[6800:6818], - forms[6818:6836], - forms[6836:6863], - forms[6863:6890], - forms[6890:6917], - forms[6917:6944], - forms[6944:6971], - forms[6971:6998], - forms[6998:7000], - forms[7000:7002], - forms[7002:7020], - forms[7020:7038], - forms[7038:7056], - forms[7056:7083], - forms[7083:7110], - forms[7110:7137], - forms[7137:7164], - forms[7164:7182], - forms[7182:7236], - forms[7236:7290], - forms[7290:7326], - forms[7326:7344], - forms[7344:7380], - forms[7380:7398], - forms[7398:7425], - forms[7425:7452], - forms[7452:7479], - forms[7479:7506], - forms[7506:7524], - forms[7524:7542], - forms[7542:7560], - forms[7560:7578], - forms[7578:7580], - forms[7580:7582], - forms[7582:7584], - forms[7584:7586], - forms[7586:7591], - forms[7591:7596], - forms[7596:7601], - forms[7601:7606], - forms[7606:7610], - forms[7610:7614], - forms[7614:7618], - forms[7618:7620], - forms[7620:7624], - forms[7624:7628], - forms[7628:7632], - forms[7632:7634], - forms[7634:7636], - forms[7636:7638], - forms[7638:7640], - forms[7640:7667], - forms[7667:7694], - forms[7694:7721], - forms[7721:7748], - forms[7748:7766], - forms[7766:7784], - forms[7784:7788], - forms[7788:7792], - forms[7792:7810], - forms[7810:7837], - forms[7837:7864], - forms[7864:7882], - forms[7882:7900], - forms[7900:7927], - forms[7927:7954], - forms[7954:7972], - forms[7972:7990], - forms[7990:8017], - forms[8017:8044], - forms[8044:8062], - forms[8062:8080], - forms[8080:8107], - forms[8107:8134], - forms[8134:8152], - forms[8152:8155], - forms[8155:8158], - forms[8158:8176], - forms[8176:8194], - forms[8194:8197], - forms[8197:8200], - forms[8200:8203], - forms[8203:8206], - forms[8206:8208], - forms[8208:8211], - forms[8211:8229], - forms[8229:8247], - forms[8247:8265], - forms[8265:8283], - forms[8283:8301], - forms[8301:8319], - forms[8319:8337], - forms[8337:8355], - forms[8355:8373], - forms[8373:8391], - forms[8391:8409], - forms[8409:8427], - forms[8427:8445], - forms[8445:8463], - forms[8463:8481], - forms[8481:8499], - forms[8499:8517], - forms[8517:8535], - forms[8535:8553], - forms[8553:8571], - forms[8571:8589], - forms[8589:8592], - forms[8592:8610], - forms[8610:8628], - forms[8628:8646], - forms[8646:8664], - forms[8664:8682], - forms[8682:8700], - forms[8700:8718], - forms[8718:8745], - forms[8745:8763], - forms[8763:8781], - forms[8781:8799], - forms[8799:8826], - forms[8826:8853], - forms[8853:8871], - forms[8871:8898], - forms[8898:8925], - forms[8925:8943], - forms[8943:8970], - forms[8970:8997], - forms[8997:9015], - forms[9015:9019], - forms[9019:9046], - forms[9046:9073], - forms[9073:9100], - forms[9100:9127], - forms[9127:9154], - forms[9154:9181], - forms[9181:9208], - forms[9208:9235], - forms[9235:9262], - forms[9262:9289], - forms[9289:9295], - forms[9295:9298], - forms[9298:9301], - forms[9301:9304], - forms[9304:9307], - forms[9307:9325], - forms[9325:9337], - forms[9337:9364], - forms[9364:9382], - forms[9382:9400], - forms[9400:9404], - forms[9404:9408], - forms[9408:9412], - forms[9412:9457], - forms[9457:9463], - forms[9463:9508], - forms[9508:9535], - forms[9535:9562], - forms[9562:9580], - forms[9580:9616], - forms[9616:9661], - forms[9661:9706], - forms[9706:9733], - forms[9733:9760], - forms[9760:9778], - forms[9778:9814], - forms[9814:9859], - forms[9859:9865], - forms[9865:9910], - forms[9910:9937], - forms[9937:9964], - forms[9964:9982], - forms[9982:10018], - forms[10018:10036], - forms[10036:10063], - forms[10063:10090], - forms[10090:10108], - forms[10108:10126], - forms[10126:10144], - forms[10144:10162], - forms[10162:10180], - forms[10180:10207], - forms[10207:10234], - forms[10234:10238], - forms[10238:10250], - forms[10250:10268], - forms[10268:10286], - forms[10286:10298], - forms[10298:10310], - forms[10310:10328], - forms[10328:10346], - forms[10346:10358], - forms[10358:10376], - forms[10376:10403], - forms[10403:10430], - forms[10430:10448], - forms[10448:10466], - forms[10466:10493], - forms[10493:10520], - forms[10520:10538], - forms[10538:10542], - forms[10542:10569], - forms[10569:10596], - forms[10596:10626], - forms[10626:10656], - forms[10656:10665], - forms[10665:10674], - forms[10674:10701], - forms[10701:10728], - forms[10728:10734], - forms[10734:10740], - forms[10740:10752], - forms[10752:10764], - forms[10764:10773], - forms[10773:10782], - forms[10782:10786], - forms[10786:10788], - forms[10788:10815], - forms[10815:10842], - forms[10842:10848], - forms[10848:10854], - forms[10854:10884], - forms[10884:10914], - forms[10914:10923], - forms[10923:10932], - forms[10932:10936], - forms[10936:10940], - forms[10940:10942], - forms[10942:10944], - forms[10944:10971], - forms[10971:10998], - forms[10998:11004], - forms[11004:11010], - forms[11010:11022], - forms[11022:11034], - forms[11034:11043], - forms[11043:11052], - forms[11052:11056], - forms[11056:11058], - forms[11058:11088], - forms[11088:11118], + forms[6800:6815], + forms[6815:6833], + forms[6833:6851], + forms[6851:6866], + forms[6866:6893], + forms[6893:6920], + forms[6920:6947], + forms[6947:6974], + forms[6974:7001], + forms[7001:7028], + forms[7028:7030], + forms[7030:7032], + forms[7032:7050], + forms[7050:7068], + forms[7068:7086], + forms[7086:7113], + forms[7113:7140], + forms[7140:7167], + forms[7167:7194], + forms[7194:7212], + forms[7212:7266], + forms[7266:7320], + forms[7320:7356], + forms[7356:7374], + forms[7374:7410], + forms[7410:7428], + forms[7428:7455], + forms[7455:7482], + forms[7482:7509], + forms[7509:7536], + forms[7536:7554], + forms[7554:7572], + forms[7572:7590], + forms[7590:7608], + forms[7608:7626], + forms[7626:7644], + forms[7644:7646], + forms[7646:7648], + forms[7648:7650], + forms[7650:7652], + forms[7652:7657], + forms[7657:7662], + forms[7662:7667], + forms[7667:7672], + forms[7672:7676], + forms[7676:7680], + forms[7680:7684], + forms[7684:7686], + forms[7686:7690], + forms[7690:7694], + forms[7694:7698], + forms[7698:7700], + forms[7700:7702], + forms[7702:7704], + forms[7704:7706], + forms[7706:7733], + forms[7733:7760], + forms[7760:7787], + forms[7787:7814], + forms[7814:7832], + forms[7832:7850], + forms[7850:7854], + forms[7854:7858], + forms[7858:7876], + forms[7876:7903], + forms[7903:7930], + forms[7930:7948], + forms[7948:7966], + forms[7966:7993], + forms[7993:8020], + forms[8020:8038], + forms[8038:8056], + forms[8056:8083], + forms[8083:8110], + forms[8110:8128], + forms[8128:8146], + forms[8146:8173], + forms[8173:8200], + forms[8200:8218], + forms[8218:8221], + forms[8221:8224], + forms[8224:8242], + forms[8242:8260], + forms[8260:8263], + forms[8263:8266], + forms[8266:8269], + forms[8269:8272], + forms[8272:8274], + forms[8274:8277], + forms[8277:8295], + forms[8295:8313], + forms[8313:8331], + forms[8331:8349], + forms[8349:8367], + forms[8367:8385], + forms[8385:8403], + forms[8403:8421], + forms[8421:8439], + forms[8439:8457], + forms[8457:8475], + forms[8475:8493], + forms[8493:8511], + forms[8511:8529], + forms[8529:8547], + forms[8547:8565], + forms[8565:8583], + forms[8583:8601], + forms[8601:8619], + forms[8619:8637], + forms[8637:8655], + forms[8655:8658], + forms[8658:8676], + forms[8676:8694], + forms[8694:8712], + forms[8712:8730], + forms[8730:8748], + forms[8748:8766], + forms[8766:8784], + forms[8784:8811], + forms[8811:8829], + forms[8829:8847], + forms[8847:8865], + forms[8865:8892], + forms[8892:8919], + forms[8919:8937], + forms[8937:8964], + forms[8964:8991], + forms[8991:9009], + forms[9009:9036], + forms[9036:9063], + forms[9063:9081], + forms[9081:9085], + forms[9085:9112], + forms[9112:9139], + forms[9139:9166], + forms[9166:9193], + forms[9193:9220], + forms[9220:9247], + forms[9247:9274], + forms[9274:9301], + forms[9301:9328], + forms[9328:9355], + forms[9355:9361], + forms[9361:9364], + forms[9364:9367], + forms[9367:9370], + forms[9370:9373], + forms[9373:9400], + forms[9400:9427], + forms[9427:9454], + forms[9454:9481], + forms[9481:9499], + forms[9499:9517], + forms[9517:9544], + forms[9544:9571], + forms[9571:9598], + forms[9598:9625], + forms[9625:9643], + forms[9643:9661], + forms[9661:9679], + forms[9679:9691], + forms[9691:9718], + forms[9718:9736], + forms[9736:9754], + forms[9754:9758], + forms[9758:9762], + forms[9762:9766], + forms[9766:9811], + forms[9811:9817], + forms[9817:9862], + forms[9862:9889], + forms[9889:9916], + forms[9916:9934], + forms[9934:9970], + forms[9970:10015], + forms[10015:10060], + forms[10060:10087], + forms[10087:10114], + forms[10114:10132], + forms[10132:10168], + forms[10168:10213], + forms[10213:10219], + forms[10219:10264], + forms[10264:10291], + forms[10291:10318], + forms[10318:10336], + forms[10336:10372], + forms[10372:10390], + forms[10390:10417], + forms[10417:10444], + forms[10444:10462], + forms[10462:10480], + forms[10480:10498], + forms[10498:10516], + forms[10516:10534], + forms[10534:10561], + forms[10561:10588], + forms[10588:10592], + forms[10592:10604], + forms[10604:10622], + forms[10622:10640], + forms[10640:10652], + forms[10652:10664], + forms[10664:10682], + forms[10682:10700], + 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