12 Commits

Author SHA1 Message Date
33208a2356 update 2026-03-06 20:14:02 +00:00
Michael McLoughlin
b76e849b5c all: AVX-512 (#217)
Extends avo to support most AVX-512 instruction sets.

The instruction type is extended to support suffixes. The K family of opmask
registers is added to the register package, and the operand package is updated
to support the new operand types. Move instruction deduction in `Load` and
`Store` is extended to support KMOV* and VMOV* forms.

Internal code generation packages were overhauled. Instruction database loading
required various messy changes to account for the additional complexities of the
AVX-512 instruction sets. The internal/api package was added to introduce a
separation between instruction forms in the database, and the functions avo
provides to create them. This was required since with instruction suffixes there
is no longer a one-to-one mapping between instruction constructors and opcodes.

AVX-512 bloated generated source code size substantially, initially increasing
compilation and CI test times to an unacceptable level. Two changes were made to
address this:

1.  Instruction constructors in the `x86` package moved to an optab-based
    approach. This compiles substantially faster than the verbose code
    generation we had before.

2.  The most verbose code-generated tests are moved under build tags and
    limited to a stress test mode. Stress test builds are run on
    schedule but not in regular CI.

An example of AVX-512 accelerated 16-lane MD5 is provided to demonstrate and
test the new functionality.

Updates #20 #163 #229

Co-authored-by: Vaughn Iverson <vsivsi@yahoo.com>
2021-11-12 19:02:39 -08:00
Michael McLoughlin
d43efabdbe inst,ir: cancelling inputs (#92)
Adds support for a `CancellingInputs` instruction flag, to indicate cases like `XORQ R10, R10` where the instruction actually does not depend on the value of `R10` at all.

Closes #89
2019-07-28 17:58:49 -07:00
Michael McLoughlin
cf1739b920 internal/gen: doc exported symbols (#9) 2019-01-05 14:12:50 -08:00
Michael McLoughlin
c882e52510 printing: commit some refactors (probably broken) 2018-12-11 00:18:22 -08:00
Michael McLoughlin
82b31fa0da wip: adding instruction inputs and outputs 2018-12-02 17:57:12 -08:00
Michael McLoughlin
bed7e7e2c2 stub operand checks 2018-11-26 10:13:04 -08:00
Michael McLoughlin
0694ebab9b ensure all stdlib opcodes are present 2018-11-25 16:22:02 -08:00
Michael McLoughlin
6d3e3be578 generate test to ensure code generation worked 2018-11-24 17:53:17 -08:00
Michael McLoughlin
898d66c585 test asmtest with instruction list 2018-11-24 14:20:04 -08:00
Michael McLoughlin
70dcf2b611 generate the instruction table 2018-11-24 13:47:30 -08:00
Michael McLoughlin
f1e1da6387 refactors to code generation 2018-11-24 13:00:27 -08:00