Issue #100 demonstrated that register allocation for aliased registers is
fundamentally broken. The root of the issue is that currently accesses to the
same virtual register with different masks are treated as different registers.
This PR takes a different approach:
* Liveness analysis is masked: we now properly consider which parts of a register are live
* Register allocation produces a mapping from virtual to physical ID, and aliasing is applied later
In addition, a new pass ZeroExtend32BitOutputs accounts for the fact that 32-bit writes in 64-bit mode should actually be treated as 64-bit writes (the result is zero-extended).
Closes#100
Previously we updated the set of live in registers before live out. This
was extremely inefficient, since on each pass through live in depends on
live out.
We also change to processing the instructions in reverse order, which is
more likely to be efficient, although we should replace this with
topological sort order soon.
