Michael McLoughlin
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676ec39c51
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add Symbol type to operand
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2018-12-06 17:26:33 -08:00 |
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Michael McLoughlin
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022cbb7792
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pass: first attempt at register allocation
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2018-12-05 00:05:57 -08:00 |
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Michael McLoughlin
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7d4e18f4f4
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ast: {Input,Output}Registers()
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2018-12-02 22:29:30 -08:00 |
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Michael McLoughlin
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59548ee9f6
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rename some register types
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2018-12-02 21:35:33 -08:00 |
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Michael McLoughlin
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f18271ada5
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add reg.Type
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2018-12-02 15:15:00 -08:00 |
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Michael McLoughlin
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43575d8b61
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start at some basic passes
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2018-12-02 13:51:03 -08:00 |
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Michael McLoughlin
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4395adacc8
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x86: rel types and generated tests
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2018-11-27 22:08:11 -08:00 |
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Michael McLoughlin
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3881907ec8
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implement vm{32,64}{x,y} operand checks
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2018-11-26 23:53:07 -08:00 |
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Michael McLoughlin
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0ec52ceaa8
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add IsM* operand checks
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2018-11-26 23:35:26 -08:00 |
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Michael McLoughlin
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3050882621
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start to implement operand types and checks
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2018-11-26 22:14:36 -08:00 |
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Michael McLoughlin
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bed7e7e2c2
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stub operand checks
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2018-11-26 10:13:04 -08:00 |
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