Commit Graph

6 Commits

Author SHA1 Message Date
Michael McLoughlin
f40d602170 reg,pass: refactor allocation of aliased registers (#121)
Issue #100 demonstrated that register allocation for aliased registers is
fundamentally broken. The root of the issue is that currently accesses to the
same virtual register with different masks are treated as different registers.
This PR takes a different approach:

* Liveness analysis is masked: we now properly consider which parts of a register are live
* Register allocation produces a mapping from virtual to physical ID, and aliasing is applied later

In addition, a new pass ZeroExtend32BitOutputs accounts for the fact that 32-bit writes in 64-bit mode should actually be treated as 64-bit writes (the result is zero-extended).

Closes #100
2020-01-22 22:50:40 -08:00
Michael McLoughlin
138eaf8dc3 reg: rename Bytes() to Size() (#74)
It was pointed out #73 that Bytes() is a poor name for the size of the register in bytes. In idiomatic Go you would probably expect a Bytes() method to return []byte.

This diff changes the Bytes() to Size(). As a result the Size type also needed to be renamed, and Width seemed a reasonable choice.

Fixes #73
2019-04-01 20:27:44 -07:00
Michael McLoughlin
dc571a47df reg: doc exported symbols (#9) 2019-01-04 22:06:00 -08:00
Michael McLoughlin
672b77a441 reg,build: remove "v" from virtual register ctors
Fixes #30
2019-01-04 18:23:44 -08:00
Michael McLoughlin
18cdf50d7c reg: support for register casting
Adds methods for referencing sub- or super-registers. For example, for
general purpose registers you can now reference As8(), As16(), ... and
for vector AsX(), AsY(), AsZ().

Closes #1
2018-12-30 18:40:45 -08:00
Michael McLoughlin
faafa00e40 pass: test for liveness 2018-12-03 20:40:43 -08:00