Michael McLoughlin
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09848512cc
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add -bootstrap option to avogen
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2018-11-25 17:11:24 -08:00 |
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Michael McLoughlin
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b99b2cdbbf
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script to run code generation
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2018-11-25 17:00:14 -08:00 |
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Michael McLoughlin
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0694ebab9b
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ensure all stdlib opcodes are present
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2018-11-25 16:22:02 -08:00 |
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Michael McLoughlin
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6d3e3be578
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generate test to ensure code generation worked
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2018-11-24 17:53:17 -08:00 |
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Michael McLoughlin
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0edbdb064f
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supporting more instructions seen in stdlib
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2018-11-24 17:32:18 -08:00 |
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Michael McLoughlin
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124587f55c
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fix go version in .travis.yml
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2018-11-24 16:21:28 -08:00 |
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Michael McLoughlin
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e02e8491ca
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basic travis
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2018-11-24 16:17:49 -08:00 |
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Michael McLoughlin
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a70227cbe3
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test for stdlib opcodes
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2018-11-24 14:55:51 -08:00 |
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Michael McLoughlin
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898d66c585
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test asmtest with instruction list
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2018-11-24 14:20:04 -08:00 |
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Michael McLoughlin
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bec73ca7a1
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basic instruction properties
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2018-11-24 14:08:55 -08:00 |
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Michael McLoughlin
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70dcf2b611
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generate the instruction table
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2018-11-24 13:47:30 -08:00 |
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Michael McLoughlin
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f1e1da6387
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refactors to code generation
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2018-11-24 13:00:27 -08:00 |
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Michael McLoughlin
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4571841ee5
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fix implicit operands
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2018-11-23 23:48:47 -08:00 |
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Michael McLoughlin
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4e059c258b
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import isa and implicit operands
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2018-11-23 17:14:18 -06:00 |
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Michael McLoughlin
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86373c79ee
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load: handle MOVABS special case
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2018-11-23 16:14:05 -06:00 |
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Michael McLoughlin
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2f7c14f061
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loadertest: more vm* operands
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2018-11-23 15:31:12 -06:00 |
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Michael McLoughlin
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ae6909493c
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loadertest: support vm32{x,y}
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2018-11-23 15:26:19 -06:00 |
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Michael McLoughlin
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6370e39b88
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oops: do not skip CALL instruction
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2018-11-22 16:22:36 -06:00 |
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Michael McLoughlin
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4404836ff4
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loadertest: rel8/32 operands
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2018-11-22 16:21:05 -06:00 |
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Michael McLoughlin
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27235485a6
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m256 arguments, MMX exception
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2018-11-22 15:24:28 -06:00 |
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Michael McLoughlin
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1f20eae901
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loadertest: more operand types
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2018-11-22 14:58:31 -06:00 |
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Michael McLoughlin
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e97da03f19
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loadertest: add memory operands
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2018-11-22 14:12:20 -06:00 |
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Michael McLoughlin
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c67dcb7fa9
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add more immediates to loader test
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2018-11-22 11:17:46 -06:00 |
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Michael McLoughlin
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c1601f0fe0
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remove ifind.sh from git
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2018-11-21 23:08:05 -06:00 |
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Michael McLoughlin
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b5c22e9464
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handle order differences
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2018-11-21 23:06:29 -06:00 |
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Michael McLoughlin
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c30d7fb743
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handle xmm instructions
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2018-11-21 22:28:55 -06:00 |
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Michael McLoughlin
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836252fa13
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add some encoding fields to Opcodes XML reader
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2018-11-21 21:38:19 -06:00 |
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Michael McLoughlin
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59e6af7d36
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wip
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2018-11-21 13:02:18 -06:00 |
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Michael McLoughlin
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cb259ce43b
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rm x86csv stuff
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2018-11-20 15:12:04 -06:00 |
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Michael McLoughlin
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308ef56457
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add link to opcodesxml
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2018-11-20 15:10:25 -06:00 |
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Michael McLoughlin
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a956274bc3
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import data files
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2018-11-20 15:08:22 -06:00 |
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Michael McLoughlin
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19c5bbb3c6
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ingester for opcodes xml
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2018-11-20 13:51:22 -06:00 |
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Michael McLoughlin
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7c2990754f
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wip
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2018-11-20 11:44:44 -06:00 |
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Michael McLoughlin
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33ef56f40e
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skeleton register package
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2018-11-11 22:17:06 -06:00 |
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Michael McLoughlin
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b5c1cdcfa6
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really basic instruction generator
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2018-11-07 00:39:43 -05:00 |
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Michael McLoughlin
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5fb985ad23
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sketch
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2018-11-06 21:10:54 -05:00 |
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Michael McLoughlin
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099f29d941
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link to PeachPy
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2018-11-04 09:47:49 -08:00 |
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Michael McLoughlin
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9098bcc87e
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Initial commit
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2018-11-04 09:44:22 -08:00 |
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