Commit Graph

17 Commits

Author SHA1 Message Date
Michael McLoughlin
946323570a all: add GFNI instructions (#344)
Adds support for the GFNI "Galois Field New Instructions" instruction set.

These instructions are not included in the Opcodes database, therefore they're
added using the "extras" mechanism introduced in #345.

For simplicity, the loading phase is updated slightly so that AVX-512 form
expansion rules are applied after extras are added to the list. This greatly
reduces the number of forms that have to be specified by hand.

Based on #343
Fixes #335

Co-authored-by: Klaus Post <klauspost@gmail.com>
2022-11-27 18:53:46 -08:00
Michael McLoughlin
b76e849b5c all: AVX-512 (#217)
Extends avo to support most AVX-512 instruction sets.

The instruction type is extended to support suffixes. The K family of opmask
registers is added to the register package, and the operand package is updated
to support the new operand types. Move instruction deduction in `Load` and
`Store` is extended to support KMOV* and VMOV* forms.

Internal code generation packages were overhauled. Instruction database loading
required various messy changes to account for the additional complexities of the
AVX-512 instruction sets. The internal/api package was added to introduce a
separation between instruction forms in the database, and the functions avo
provides to create them. This was required since with instruction suffixes there
is no longer a one-to-one mapping between instruction constructors and opcodes.

AVX-512 bloated generated source code size substantially, initially increasing
compilation and CI test times to an unacceptable level. Two changes were made to
address this:

1.  Instruction constructors in the `x86` package moved to an optab-based
    approach. This compiles substantially faster than the verbose code
    generation we had before.

2.  The most verbose code-generated tests are moved under build tags and
    limited to a stress test mode. Stress test builds are run on
    schedule but not in regular CI.

An example of AVX-512 accelerated 16-lane MD5 is provided to demonstrate and
test the new functionality.

Updates #20 #163 #229

Co-authored-by: Vaughn Iverson <vsivsi@yahoo.com>
2021-11-12 19:02:39 -08:00
Michael McLoughlin
d43efabdbe inst,ir: cancelling inputs (#92)
Adds support for a `CancellingInputs` instruction flag, to indicate cases like `XORQ R10, R10` where the instruction actually does not depend on the value of `R10` at all.

Closes #89
2019-07-28 17:58:49 -07:00
Michael McLoughlin
f9a67bb2c0 internal/inst: doc exported symbols (#9) 2019-01-05 11:43:59 -08:00
Michael McLoughlin
69ee0e39cb parameter loading 2018-12-08 20:14:51 -08:00
Michael McLoughlin
82b31fa0da wip: adding instruction inputs and outputs 2018-12-02 17:57:12 -08:00
Michael McLoughlin
43575d8b61 start at some basic passes 2018-12-02 13:51:03 -08:00
Michael McLoughlin
bed7e7e2c2 stub operand checks 2018-11-26 10:13:04 -08:00
Michael McLoughlin
af02be06ba add skeleton for instruction constructors 2018-11-25 21:50:46 -08:00
Michael McLoughlin
4dcfed6e16 add instruction arities function 2018-11-25 18:25:51 -08:00
Michael McLoughlin
0694ebab9b ensure all stdlib opcodes are present 2018-11-25 16:22:02 -08:00
Michael McLoughlin
0edbdb064f supporting more instructions seen in stdlib 2018-11-24 17:32:18 -08:00
Michael McLoughlin
70dcf2b611 generate the instruction table 2018-11-24 13:47:30 -08:00
Michael McLoughlin
4571841ee5 fix implicit operands 2018-11-23 23:48:47 -08:00
Michael McLoughlin
4e059c258b import isa and implicit operands 2018-11-23 17:14:18 -06:00
Michael McLoughlin
59e6af7d36 wip 2018-11-21 13:02:18 -06:00
Michael McLoughlin
7c2990754f wip 2018-11-20 11:44:44 -06:00