144 lines
3.6 KiB
Go
144 lines
3.6 KiB
Go
package operand
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import (
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"reflect"
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"runtime"
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"testing"
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"github.com/mmcloughlin/avo"
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"github.com/mmcloughlin/avo/reg"
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)
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func TestChecks(t *testing.T) {
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cases := []struct {
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Predicate func(avo.Operand) bool
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Operand avo.Operand
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Expect bool
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}{
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// Immediates
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{Is1, Imm(1), true},
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{Is1, Imm(23), false},
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{Is3, Imm(3), true},
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{Is3, Imm(23), false},
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{IsImm2u, Imm(3), true},
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{IsImm2u, Imm(4), false},
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{IsImm8, Imm(255), true},
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{IsImm8, Imm(256), false},
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{IsImm16, Imm((1 << 16) - 1), true},
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{IsImm16, Imm(1 << 16), false},
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{IsImm32, Imm((1 << 32) - 1), true},
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{IsImm32, Imm(1 << 32), false},
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{IsImm64, Imm((1 << 64) - 1), true},
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// Specific registers
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{IsAl, reg.AL, true},
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{IsAl, reg.CL, false},
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{IsCl, reg.CL, true},
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{IsCl, reg.DH, false},
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{IsAx, reg.AX, true},
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{IsAx, reg.DX, false},
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{IsEax, reg.EAX, true},
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{IsEax, reg.ECX, false},
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{IsRax, reg.RAX, true},
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{IsRax, reg.R13, false},
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// General-purpose registers
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{IsR8, reg.AL, true},
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{IsR8, reg.CH, true},
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{IsR8, reg.EAX, false},
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{IsR16, reg.DX, true},
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{IsR16, reg.R10W, true},
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{IsR16, reg.R10B, false},
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{IsR32, reg.EBP, true},
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{IsR32, reg.R14L, true},
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{IsR32, reg.R8, false},
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{IsR64, reg.RDX, true},
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{IsR64, reg.R10, true},
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{IsR64, reg.EBX, false},
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// SIMD registers
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{IsXmm0, reg.X0, true},
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{IsXmm0, reg.X13, false},
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{IsXmm0, reg.Y3, false},
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{IsXmm, reg.X0, true},
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{IsXmm, reg.X13, true},
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{IsXmm, reg.Y3, false},
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{IsXmm, reg.Z23, false},
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{IsYmm, reg.Y0, true},
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{IsYmm, reg.Y13, true},
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{IsYmm, reg.Y31, true},
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{IsYmm, reg.X3, false},
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{IsYmm, reg.Z3, false},
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// Memory operands
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{IsM, Mem{Base: reg.CX}, true},
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{IsM, Mem{Base: reg.ECX}, true},
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{IsM, Mem{Base: reg.RCX}, true},
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{IsM, Mem{Base: reg.CL}, false},
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{IsM8, Mem{Disp: 8, Base: reg.CL}, true},
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{IsM8, Mem{Disp: 8, Base: reg.CL, Index: reg.AH, Scale: 2}, true},
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{IsM8, Mem{Disp: 8, Base: reg.AX, Index: reg.AH, Scale: 2}, false},
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{IsM8, Mem{Disp: 8, Base: reg.CL, Index: reg.R10, Scale: 2}, false},
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{IsM16, Mem{Disp: 4, Base: reg.DX}, true},
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{IsM16, Mem{Disp: 4, Base: reg.R13W, Index: reg.R8W, Scale: 2}, true},
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{IsM16, Mem{Disp: 4, Base: reg.ESI, Index: reg.R8W, Scale: 2}, false},
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{IsM16, Mem{Disp: 4, Base: reg.R13W, Index: reg.R9, Scale: 2}, false},
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{IsM32, Mem{Base: reg.R13L, Index: reg.EBX, Scale: 2}, true},
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{IsM32, Mem{Base: reg.R13W}, false},
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{IsM64, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
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{IsM64, Mem{Base: reg.R13L}, false},
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{IsM128, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
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{IsM128, Mem{Base: reg.R13L}, false},
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{IsM256, Mem{Base: reg.RBX, Index: reg.R12, Scale: 2}, true},
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{IsM256, Mem{Base: reg.R13L}, false},
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// Vector memory operands
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{IsVm32x, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVm32x, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVm32x, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVm64x, Mem{Base: reg.R14, Index: reg.X11}, true},
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{IsVm64x, Mem{Base: reg.R14L, Index: reg.X11}, false},
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{IsVm64x, Mem{Base: reg.R14, Index: reg.Y11}, false},
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{IsVm32y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVm32y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVm32y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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{IsVm64y, Mem{Base: reg.R9, Index: reg.Y11}, true},
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{IsVm64y, Mem{Base: reg.R11L, Index: reg.Y11}, false},
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{IsVm64y, Mem{Base: reg.R8, Index: reg.Z11}, false},
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}
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for _, c := range cases {
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if c.Predicate(c.Operand) != c.Expect {
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t.Errorf("%s( %#v ) != %v", funcname(c.Predicate), c.Operand, c.Expect)
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}
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}
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}
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func funcname(f interface{}) string {
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return runtime.FuncForPC(reflect.ValueOf(f).Pointer()).Name()
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}
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