Vaughn Iverson fc7bbb86e5 internal/opcodesextra: fix actions for VNNI and VBMI2 shifts (#372) ...

Fix the destination register actions for VNNI and VBMI2 concatenate and
variable shift instructions `VPSH{L,R}DV{W,D,Q}`. In the case of mask merging,
the action should be `RW` not `W`.

Prior to this change, the bug manifests as incorrect vector register
scheduling when `avo` doesn't recognize that these instructions have a data
dependency on the destination register.

See:
https://www.felixcloutier.com/x86/vpdpbusd
https://www.felixcloutier.com/x86/vpdpbusds
https://www.felixcloutier.com/x86/vpshldv
https://www.felixcloutier.com/x86/vpshrdv

2023-03-06 22:52:03 -08:00

..

api

all: AVX-512 (#217)

2021-11-12 19:02:39 -08:00

cmd

doc: fix README ci badge (#352)

2023-01-07 10:46:51 -08:00

data

internal/data: bump versions (#346)

2022-11-27 20:57:30 -08:00

gen

all: remove +build tags (#377)

2023-03-05 20:30:01 -08:00

github

tests/thirdparty: add skip option (#228)

2021-11-10 18:44:28 -08:00

inst

internal/opcodesextra: fix actions for VNNI and VBMI2 shifts (#372)

2023-03-06 22:52:03 -08:00

load

all: add GFNI instructions (#344)

2022-11-27 18:53:46 -08:00

opcodescsv

all: apply gofumpt (#79)

2019-04-13 22:53:13 -05:00

opcodesextra

internal/opcodesextra: fix actions for VNNI and VBMI2 shifts (#372)

2023-03-06 22:52:03 -08:00

opcodesxml

all: upgrade to golangci-lint v1.49.0 (#329)

2022-09-05 17:25:03 -07:00

prnt

all: remove +build tags (#377)

2023-03-05 20:30:01 -08:00

stack

lint: switch to linter blacklist

2019-01-09 22:31:14 -08:00

test

all: upgrade to golangci-lint v1.49.0 (#329)

2022-09-05 17:25:03 -07:00