f40d602170
Issue #100 demonstrated that register allocation for aliased registers is fundamentally broken. The root of the issue is that currently accesses to the same virtual register with different masks are treated as different registers. This PR takes a different approach: * Liveness analysis is masked: we now properly consider which parts of a register are live * Register allocation produces a mapping from virtual to physical ID, and aliasing is applied later In addition, a new pass ZeroExtend32BitOutputs accounts for the fact that 32-bit writes in 64-bit mode should actually be treated as 64-bit writes (the result is zero-extended). Closes #100
67 lines
1.5 KiB
Go
67 lines
1.5 KiB
Go
// +build ignore
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package main
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import (
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"strconv"
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. "github.com/mmcloughlin/avo/build"
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. "github.com/mmcloughlin/avo/operand"
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. "github.com/mmcloughlin/avo/reg"
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)
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// The goal is to test for correct handling of 32-bit operands in 64-bit mode,
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// specifically that writes are zero-extended to 64 bits. This test is
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// constructed such that the register allocator would fail if this feature is
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// not accounted for. It consists of multiple copies of a 32-bit write followed
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// by a 64-bit read of the same register. Without special treatment liveness
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// analysis would consider the upper 32 bits to still be live prior to the
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// write. Therefore if we stack up enough copies of this, we could cause the
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// register allocator to fail.
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func main() {
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const (
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r = 14 // number of registers
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m = 3 // number of iterations
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n = r * m
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)
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TEXT("Upper32", NOSPLIT, "func() uint64")
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Doc("Upper32 computes the sum 1+2+...+" + strconv.Itoa(n) + ".")
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Comment("Initialize sum.")
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s := GP64()
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XORQ(s, s)
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// Allocate n 64-bit registers and populate them.
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Comment("Initialize registers.")
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x := make([]GPVirtual, n)
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for i := 0; i < n; i++ {
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x[i] = GP64()
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MOVQ(U64(0x9e77d78aacb8cbcc), x[i])
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}
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k := 0
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for i := 0; i < m; i++ {
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Commentf("Iteration %d.", i+1)
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// Write to the 32-bit aliases of r registers.
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for j := 0; j < r; j++ {
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MOVL(U32(k+j+1), x[k+j].As32())
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}
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// Sum them up.
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for j := 0; j < r; j++ {
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ADDQ(x[k+j], s)
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}
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k += r
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}
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Comment("Store result and return.")
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Store(s, ReturnIndex(0))
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RET()
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Generate()
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}
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