all: VBMI2 instructions (#363)
Adds the "Vector Bit Manipulation Instructions 2" instruction set. These new instructions are added via the `opcodesextra` mechanism #345, since they're missing from the opcodes database. Contributed by @vsivsi. Extracted from #349 with simplifications. Specifically, as prompted by the `dupl` linter we extract some common forms lists into a helper `forms.go` file. Co-authored-by: Vaughn Iverson <vsivsi@yahoo.com>
This commit is contained in:
Michael McLoughlin
committed by
GitHub
GitHub
parent
05ed388d0f
commit
e2c0a40f50
File diff suppressed because it is too large
Load Diff
@@ -2384,10 +2384,14 @@ func TestContextInstructions(t *testing.T) {
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ctx.VPCMPUQ_BCST(opimm8, opm64, opxmm, opk, opk)
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ctx.VPCMPUQ_BCST(opimm8, opm64, opxmm, opk, opk)
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ctx.VPCMPUW(opimm8, opm128, opxmm, opk, opk)
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ctx.VPCMPUW(opimm8, opm128, opxmm, opk, opk)
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ctx.VPCMPW(opimm8, opm128, opxmm, opk, opk)
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ctx.VPCMPW(opimm8, opm128, opxmm, opk, opk)
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ctx.VPCOMPRESSB(opxmm, opk, opm128)
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ctx.VPCOMPRESSB_Z(opxmm, opk, opxmm)
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ctx.VPCOMPRESSD(opxmm, opk, opm128)
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ctx.VPCOMPRESSD(opxmm, opk, opm128)
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ctx.VPCOMPRESSD_Z(opxmm, opk, opm128)
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ctx.VPCOMPRESSD_Z(opxmm, opk, opm128)
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ctx.VPCOMPRESSQ(opxmm, opk, opm128)
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ctx.VPCOMPRESSQ(opxmm, opk, opm128)
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ctx.VPCOMPRESSQ_Z(opxmm, opk, opm128)
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ctx.VPCOMPRESSQ_Z(opxmm, opk, opm128)
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ctx.VPCOMPRESSW(opxmm, opk, opm128)
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ctx.VPCOMPRESSW_Z(opxmm, opk, opxmm)
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ctx.VPCONFLICTD(opm128, opk, opxmm)
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ctx.VPCONFLICTD(opm128, opk, opxmm)
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ctx.VPCONFLICTD_BCST(opm32, opk, opxmm)
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ctx.VPCONFLICTD_BCST(opm32, opk, opxmm)
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ctx.VPCONFLICTD_BCST_Z(opm32, opk, opxmm)
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ctx.VPCONFLICTD_BCST_Z(opm32, opk, opxmm)
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@@ -2482,10 +2486,14 @@ func TestContextInstructions(t *testing.T) {
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ctx.VPERMT2W_Z(opm128, opxmm, opk, opxmm)
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ctx.VPERMT2W_Z(opm128, opxmm, opk, opxmm)
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ctx.VPERMW(opm128, opxmm, opk, opxmm)
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ctx.VPERMW(opm128, opxmm, opk, opxmm)
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ctx.VPERMW_Z(opm128, opxmm, opk, opxmm)
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ctx.VPERMW_Z(opm128, opxmm, opk, opxmm)
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ctx.VPEXPANDB(opm128, opk, opxmm)
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ctx.VPEXPANDB_Z(opm128, opk, opxmm)
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ctx.VPEXPANDD(opm128, opk, opxmm)
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ctx.VPEXPANDD(opm128, opk, opxmm)
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ctx.VPEXPANDD_Z(opm128, opk, opxmm)
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ctx.VPEXPANDD_Z(opm128, opk, opxmm)
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ctx.VPEXPANDQ(opm128, opk, opxmm)
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ctx.VPEXPANDQ(opm128, opk, opxmm)
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ctx.VPEXPANDQ_Z(opm128, opk, opxmm)
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ctx.VPEXPANDQ_Z(opm128, opk, opxmm)
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ctx.VPEXPANDW(opm128, opk, opxmm)
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ctx.VPEXPANDW_Z(opm128, opk, opxmm)
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ctx.VPEXTRB(opimm8, opxmm, opm8)
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ctx.VPEXTRB(opimm8, opxmm, opm8)
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ctx.VPEXTRD(opimm8, opxmm, opm32)
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ctx.VPEXTRD(opimm8, opxmm, opm32)
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ctx.VPEXTRQ(opimm8, opxmm, opm64)
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ctx.VPEXTRQ(opimm8, opxmm, opm64)
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@@ -2730,6 +2738,46 @@ func TestContextInstructions(t *testing.T) {
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ctx.VPSCATTERDQ(opxmm, opk, opvm32x)
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ctx.VPSCATTERDQ(opxmm, opk, opvm32x)
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ctx.VPSCATTERQD(opxmm, opk, opvm64x)
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ctx.VPSCATTERQD(opxmm, opk, opvm64x)
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ctx.VPSCATTERQQ(opxmm, opk, opvm64x)
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ctx.VPSCATTERQQ(opxmm, opk, opvm64x)
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ctx.VPSHLDD(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHLDD_BCST(opimm8, opm32, opxmm, opk, opxmm)
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ctx.VPSHLDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
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ctx.VPSHLDD_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHLDQ(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHLDQ_BCST(opimm8, opm64, opxmm, opk, opxmm)
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ctx.VPSHLDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
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ctx.VPSHLDQ_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVD(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVD_BCST(opm32, opxmm, opk, opxmm)
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ctx.VPSHLDVD_BCST_Z(opm32, opxmm, opk, opxmm)
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ctx.VPSHLDVD_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVQ(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVQ_BCST(opm64, opxmm, opk, opxmm)
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ctx.VPSHLDVQ_BCST_Z(opm64, opxmm, opk, opxmm)
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ctx.VPSHLDVQ_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVW(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDVW_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHLDW(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHLDW_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDD(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDD_BCST(opimm8, opm32, opxmm, opk, opxmm)
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ctx.VPSHRDD_BCST_Z(opimm8, opm32, opxmm, opk, opxmm)
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ctx.VPSHRDD_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDQ(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDQ_BCST(opimm8, opm64, opxmm, opk, opxmm)
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ctx.VPSHRDQ_BCST_Z(opimm8, opm64, opxmm, opk, opxmm)
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ctx.VPSHRDQ_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVD(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVD_BCST(opm32, opxmm, opk, opxmm)
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ctx.VPSHRDVD_BCST_Z(opm32, opxmm, opk, opxmm)
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ctx.VPSHRDVD_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVQ(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVQ_BCST(opm64, opxmm, opk, opxmm)
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ctx.VPSHRDVQ_BCST_Z(opm64, opxmm, opk, opxmm)
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ctx.VPSHRDVQ_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVW(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDVW_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHRDW(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHRDW_Z(opimm8, opm128, opxmm, opk, opxmm)
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ctx.VPSHUFB(opm256, opymm, opymm)
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ctx.VPSHUFB(opm256, opymm, opymm)
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ctx.VPSHUFBITQMB(opm128, opxmm, opk, opk)
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ctx.VPSHUFBITQMB(opm128, opxmm, opk, opk)
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ctx.VPSHUFB_Z(opm128, opxmm, opk, opxmm)
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ctx.VPSHUFB_Z(opm128, opxmm, opk, opxmm)
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File diff suppressed because it is too large
Load Diff
@@ -133,56 +133,4 @@ var vpshufbitqmb = inst.Forms{
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// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
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// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
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// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
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// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
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// }
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// }
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var vpopcntb = inst.Forms{
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var vpopcntb = _yvexpandpd("AVX512BITALG", "")
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// EVEX.128.66.0F38.W0 54 /r VPOPCNTB xmm1{k1}{z}, xmm2/m128
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{
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ISA: []string{"AVX512BITALG", "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "m128", Action: inst.R},
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{Type: "xmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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{
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ISA: []string{"AVX512BITALG", "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "xmm", Action: inst.R},
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{Type: "xmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.256.66.0F38.W0 54 /r VPOPCNTB ymm1{k1}{z}, ymm2/m256
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{
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ISA: []string{"AVX512BITALG", "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "m256", Action: inst.R},
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{Type: "ymm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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{
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ISA: []string{"AVX512BITALG", "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "ymm", Action: inst.R},
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{Type: "ymm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.512.66.0F38.W0 54 /r VPOPCNTB zmm1{k1}{z}, zmm2/m512
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{
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ISA: []string{"AVX512BITALG"},
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Operands: []inst.Operand{
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{Type: "m512", Action: inst.R},
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{Type: "zmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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{
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ISA: []string{"AVX512BITALG"},
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Operands: []inst.Operand{
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{Type: "zmm", Action: inst.R},
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{Type: "zmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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}
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72
internal/opcodesextra/forms.go
Normal file
72
internal/opcodesextra/forms.go
Normal file
@@ -0,0 +1,72 @@
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package opcodesextra
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import "github.com/mmcloughlin/avo/internal/inst"
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// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L376-L383
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//
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// var _yvexpandpd = []ytab{
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// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex}},
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// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YxmEvex, Yknot0, YxrEvex}},
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// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex}},
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// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YymEvex, Yknot0, YyrEvex}},
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// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
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// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
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// }
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func _yvexpandpd(isa, bcst string) inst.Forms {
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return inst.Forms{
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// EVEX.128.66.0F38.W0 62 /r VPEXPANDB xmm1{k1}{z}, m128 A V/V AVX512_VBMI2 AVX512VL
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{
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ISA: []string{isa, "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "m128" + bcst, Action: inst.R},
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{Type: "xmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.128.66.0F38.W0 62 /r VPEXPANDB xmm1{k1}{z}, xmm2 B V/V AVX512_VBMI2 AVX512VL
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{
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ISA: []string{isa, "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "xmm", Action: inst.R},
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{Type: "xmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.256.66.0F38.W0 62 /r VPEXPANDB ymm1{k1}{z}, m256 A V/V AVX512_VBMI2 AVX512VL
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{
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ISA: []string{isa, "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "m256" + bcst, Action: inst.R},
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{Type: "ymm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.256.66.0F38.W0 62 /r VPEXPANDB ymm1{k1}{z}, ymm2 B V/V AVX512_VBMI2 AVX512VL
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{
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ISA: []string{isa, "AVX512VL"},
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Operands: []inst.Operand{
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{Type: "ymm", Action: inst.R},
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{Type: "ymm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.512.66.0F38.W0 62 /r VPEXPANDB zmm1{k1}{z}, m512 A V/V AVX512_VBMI2
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{
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ISA: []string{isa},
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Operands: []inst.Operand{
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{Type: "m512" + bcst, Action: inst.R},
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{Type: "zmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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// EVEX.512.66.0F38.W0 62 /r VPEXPANDB zmm1{k1}{z}, zmm2 B V/V AVX512_VBMI2
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{
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ISA: []string{isa},
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Operands: []inst.Operand{
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{Type: "zmm", Action: inst.R},
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{Type: "zmm{k}{z}", Action: inst.W},
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},
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EncodingType: inst.EncodingTypeEVEX,
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},
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}
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}
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@@ -1,7 +1,11 @@
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// Package opcodesextra provides curated extensions to the instruction database.
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// Package opcodesextra provides curated extensions to the instruction database.
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package opcodesextra
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package opcodesextra
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import "github.com/mmcloughlin/avo/internal/inst"
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import (
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"sort"
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"github.com/mmcloughlin/avo/internal/inst"
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)
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// sets of extra instructions.
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// sets of extra instructions.
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var sets = [][]*inst.Instruction{
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var sets = [][]*inst.Instruction{
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@@ -12,6 +16,7 @@ var sets = [][]*inst.Instruction{
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vpclmulqdq,
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vpclmulqdq,
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vpopcntdq,
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vpopcntdq,
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bitalg,
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bitalg,
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vbmi2,
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}
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}
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// Instructions returns a list of extras to add to the instructions database.
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// Instructions returns a list of extras to add to the instructions database.
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@@ -34,5 +39,15 @@ func Instructions() []*inst.Instruction {
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is = append(is, &c)
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is = append(is, &c)
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}
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}
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}
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}
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// Sort ISA lists. Similarly, this facilitates sharing helper functions for
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// building forms lists without worrying about whether the ISA list is in
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// the right order.
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for _, i := range is {
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for idx := range i.Forms {
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sort.Strings(i.Forms[idx].ISA)
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}
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}
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return is
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return is
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}
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}
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433
internal/opcodesextra/vbmi2.go
Normal file
433
internal/opcodesextra/vbmi2.go
Normal file
@@ -0,0 +1,433 @@
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package opcodesextra
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import (
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"github.com/mmcloughlin/avo/internal/inst"
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)
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// vbmi2 is the "Vector Bit Manipulation Instructions 2" instruction set.
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var vbmi2 = []*inst.Instruction{
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// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3026-L3030
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//
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// {as: AVPCOMPRESSB, ytab: _yvcompresspd, prefix: Pavx, op: opBytes{
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// avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x63,
|
||||||
|
// }},
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3041-L3045
|
||||||
|
//
|
||||||
|
// {as: AVPCOMPRESSW, ytab: _yvcompresspd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x63,
|
||||||
|
// }},
|
||||||
|
//
|
||||||
|
{
|
||||||
|
Opcode: "VPCOMPRESSB",
|
||||||
|
Summary: "Store Sparse Packed Byte Integer Values into Dense Memory/Register",
|
||||||
|
Forms: vpcompressb,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPCOMPRESSW",
|
||||||
|
Summary: "Store Sparse Packed Word Integer Values into Dense Memory/Register",
|
||||||
|
Forms: vpcompressb,
|
||||||
|
},
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3200-L3204
|
||||||
|
//
|
||||||
|
// {as: AVPEXPANDB, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN1 | evexZeroingEnabled, 0x62,
|
||||||
|
// }},
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3215-L3219
|
||||||
|
//
|
||||||
|
// {as: AVPEXPANDW, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN2 | evexZeroingEnabled, 0x62,
|
||||||
|
// }},
|
||||||
|
//
|
||||||
|
{
|
||||||
|
Opcode: "VPEXPANDB",
|
||||||
|
Summary: "Load Sparse Packed Byte Integer Values from Dense Memory/Register",
|
||||||
|
Forms: vpexpandb,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPEXPANDW",
|
||||||
|
Summary: "Load Sparse Packed Word Integer Values from Dense Memory/Register",
|
||||||
|
Forms: vpexpandb,
|
||||||
|
},
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3837-L3896
|
||||||
|
//
|
||||||
|
// {as: AVPSHLDD, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHLDQ, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHLDVD, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x71,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHLDVQ, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x71,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHLDVW, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexZeroingEnabled, 0x70,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexZeroingEnabled, 0x70,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexZeroingEnabled, 0x70,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHLDW, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexZeroingEnabled, 0x70,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexZeroingEnabled, 0x70,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexZeroingEnabled, 0x70,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDD, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDQ, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDVD, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x73,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDVQ, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x73,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDVW, ytab: _yvblendmpd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexZeroingEnabled, 0x72,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexZeroingEnabled, 0x72,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexZeroingEnabled, 0x72,
|
||||||
|
// }},
|
||||||
|
// {as: AVPSHRDW, ytab: _yvalignd, prefix: Pavx, op: opBytes{
|
||||||
|
// avxEscape | evex128 | evex66 | evex0F3A | evexW1, evexN16 | evexZeroingEnabled, 0x72,
|
||||||
|
// avxEscape | evex256 | evex66 | evex0F3A | evexW1, evexN32 | evexZeroingEnabled, 0x72,
|
||||||
|
// avxEscape | evex512 | evex66 | evex0F3A | evexW1, evexN64 | evexZeroingEnabled, 0x72,
|
||||||
|
// }},
|
||||||
|
//
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDW",
|
||||||
|
Summary: "Concatenate Words and Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshld(""),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDD",
|
||||||
|
Summary: "Concatenate Dwords and Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshld("/m32bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDQ",
|
||||||
|
Summary: "Concatenate Quadwords and Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshld("/m64bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDW",
|
||||||
|
Summary: "Concatenate Words and Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshld(""),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDD",
|
||||||
|
Summary: "Concatenate Dwords and Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshld("/m32bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDQ",
|
||||||
|
Summary: "Concatenate Quadwords and Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshld("/m64bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDVW",
|
||||||
|
Summary: "Concatenate Words and Variable Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshldv(""),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDVD",
|
||||||
|
Summary: "Concatenate Dwords and Variable Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshldv("/m32bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHLDVQ",
|
||||||
|
Summary: "Concatenate Quadwords and Variable Shift Packed Data Left Logical",
|
||||||
|
Forms: vpshldv("/m64bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDVW",
|
||||||
|
Summary: "Concatenate Words and Variable Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshldv(""),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDVD",
|
||||||
|
Summary: "Concatenate Dwords and Variable Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshldv("/m32bcst"),
|
||||||
|
},
|
||||||
|
{
|
||||||
|
Opcode: "VPSHRDVQ",
|
||||||
|
Summary: "Concatenate Quadwords and Variable Shift Packed Data Right Logical",
|
||||||
|
Forms: vpshldv("/m64bcst"),
|
||||||
|
},
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPCOMPRESSB and VPCOMPRESSW forms.
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L240-L247
|
||||||
|
//
|
||||||
|
// var _yvcompresspd = []ytab{
|
||||||
|
// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{YxrEvex, YxmEvex}},
|
||||||
|
// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{YxrEvex, Yknot0, YxmEvex}},
|
||||||
|
// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{YyrEvex, YymEvex}},
|
||||||
|
// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{YyrEvex, Yknot0, YymEvex}},
|
||||||
|
// {zcase: Zevex_r_v_rm, zoffset: 0, args: argList{Yzr, Yzm}},
|
||||||
|
// {zcase: Zevex_r_k_rm, zoffset: 3, args: argList{Yzr, Yknot0, Yzm}},
|
||||||
|
// }
|
||||||
|
var vpcompressb = inst.Forms{
|
||||||
|
// EVEX.128.66.0F38.W0 63 /r VPCOMPRESSB m128{k1}, xmm1 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "m128{k}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.128.66.0F38.W0 63 /r VPCOMPRESSB xmm1{k1}{z}, xmm2 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.256.66.0F38.W0 63 /r VPCOMPRESSB m256{k1}, ymm1 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "m256{k}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.256.66.0F38.W0 63 /r VPCOMPRESSB ymm1{k1}{z}, ymm2 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.512.66.0F38.W0 63 /r VPCOMPRESSB m512{k1}, zmm1 A V/V AVX512_VBMI2
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "m512{k}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.512.66.0F38.W0 63 /r VPCOMPRESSB zmm1{k1}{z}, zmm2 B V/V AVX512_VBMI2
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPEXPANDB and VPEXPANDW forms.
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L376-L383
|
||||||
|
//
|
||||||
|
// var _yvexpandpd = []ytab{
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex}},
|
||||||
|
// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YxmEvex, Yknot0, YxrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex}},
|
||||||
|
// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YymEvex, Yknot0, YyrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
|
||||||
|
// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
|
||||||
|
// }
|
||||||
|
var vpexpandb = _yvexpandpd("AVX512VBMI2", "")
|
||||||
|
|
||||||
|
// VPSH{L,R}D{W,D,Q} forms.
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L128-L135
|
||||||
|
//
|
||||||
|
// var _yvalignd = []ytab{
|
||||||
|
// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YxmEvex, YxrEvex, YxrEvex}},
|
||||||
|
// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YxmEvex, YxrEvex, Yknot0, YxrEvex}},
|
||||||
|
// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, YymEvex, YyrEvex, YyrEvex}},
|
||||||
|
// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, YymEvex, YyrEvex, Yknot0, YyrEvex}},
|
||||||
|
// {zcase: Zevex_i_rm_v_r, zoffset: 0, args: argList{Yu8, Yzm, Yzr, Yzr}},
|
||||||
|
// {zcase: Zevex_i_rm_v_k_r, zoffset: 3, args: argList{Yu8, Yzm, Yzr, Yknot0, Yzr}},
|
||||||
|
// }
|
||||||
|
func vpshld(bcst string) inst.Forms {
|
||||||
|
return inst.Forms{
|
||||||
|
// EVEX.128.66.0F3A.W1 70 /r /ib VPSHLDW xmm1{k1}{z}, xmm2, xmm3/m128, imm8 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.128.66.0F3A.W0 71 /r /ib VPSHLDD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst, imm8 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.128.66.0F3A.W1 71 /r /ib VPSHLDQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst, imm8 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "m128" + bcst, Action: inst.R},
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.256.66.0F3A.W1 70 /r /ib VPSHLDW ymm1{k1}{z}, ymm2, ymm3/m256, imm8 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.256.66.0F3A.W0 71 /r /ib VPSHLDD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst, imm8 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.256.66.0F3A.W1 71 /r /ib VPSHLDQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst, imm8 B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "m256" + bcst, Action: inst.R},
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.512.66.0F3A.W1 70 /r /ib VPSHLDW zmm1{k1}{z}, zmm2, zmm3/m512, imm8 A V/V AVX512_VBMI2
|
||||||
|
// EVEX.512.66.0F3A.W0 71 /r /ib VPSHLDD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst, imm8 B V/V AVX512_VBMI2
|
||||||
|
// EVEX.512.66.0F3A.W1 71 /r /ib VPSHLDQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst, imm8 B V/V AVX512_VBMI2
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "imm8"},
|
||||||
|
{Type: "m512" + bcst, Action: inst.R},
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSH{L,R}DV{W,D,Q} forms.
|
||||||
|
//
|
||||||
|
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L148-L155
|
||||||
|
//
|
||||||
|
// var _yvblendmpd = []ytab{
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex, YxrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YxmEvex, YxrEvex, Yknot0, YxrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex, YyrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{YymEvex, YyrEvex, Yknot0, YyrEvex}},
|
||||||
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr, Yzr}},
|
||||||
|
// {zcase: Zevex_rm_v_k_r, zoffset: 3, args: argList{Yzm, Yzr, Yknot0, Yzr}},
|
||||||
|
// }
|
||||||
|
func vpshldv(bcst string) inst.Forms {
|
||||||
|
return inst.Forms{
|
||||||
|
// EVEX.128.66.0F38.W1 70 /r VPSHLDVW xmm1{k1}{z}, xmm2, xmm3/m128 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.128.66.0F38.W0 71 /r VPSHLDVD xmm1{k1}{z}, xmm2, xmm3/m128/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.128.66.0F38.W1 71 /r VPSHLDVQ xmm1{k1}{z}, xmm2, xmm3/m128/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "m128" + bcst, Action: inst.R},
|
||||||
|
{Type: "xmm", Action: inst.R},
|
||||||
|
{Type: "xmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.256.66.0F38.W1 70 /r VPSHLDVW ymm1{k1}{z}, ymm2, ymm3/m256 A V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.256.66.0F38.W0 71 /r VPSHLDVD ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
// EVEX.256.66.0F38.W1 71 /r VPSHLDVQ ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst B V/V AVX512_VBMI2 AVX512VL
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2", "AVX512VL"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "m256" + bcst, Action: inst.R},
|
||||||
|
{Type: "ymm", Action: inst.R},
|
||||||
|
{Type: "ymm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
// EVEX.512.66.0F38.W1 70 /r VPSHLDVW zmm1{k1}{z}, zmm2, zmm3/m512 A V/V AVX512_VBMI2
|
||||||
|
// EVEX.512.66.0F38.W0 71 /r VPSHLDVD zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst B V/V AVX512_VBMI2
|
||||||
|
// EVEX.512.66.0F38.W1 71 /r VPSHLDVQ zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst B V/V AVX512_VBMI2
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
ISA: []string{"AVX512VBMI2"},
|
||||||
|
Operands: []inst.Operand{
|
||||||
|
{Type: "m512" + bcst, Action: inst.R},
|
||||||
|
{Type: "zmm", Action: inst.R},
|
||||||
|
{Type: "zmm{k}{z}", Action: inst.W},
|
||||||
|
},
|
||||||
|
EncodingType: inst.EncodingTypeEVEX,
|
||||||
|
},
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -23,12 +23,12 @@ var vpopcntdq = []*inst.Instruction{
|
|||||||
{
|
{
|
||||||
Opcode: "VPOPCNTD",
|
Opcode: "VPOPCNTD",
|
||||||
Summary: "Packed Population Count for Doubleword Integers",
|
Summary: "Packed Population Count for Doubleword Integers",
|
||||||
Forms: vpopcntdqforms("m32bcst"),
|
Forms: vpopcntdqforms("/m32bcst"),
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
Opcode: "VPOPCNTQ",
|
Opcode: "VPOPCNTQ",
|
||||||
Summary: "Packed Population Count for Quadword Integers",
|
Summary: "Packed Population Count for Quadword Integers",
|
||||||
Forms: vpopcntdqforms("m64bcst"),
|
Forms: vpopcntdqforms("/m64bcst"),
|
||||||
},
|
},
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -46,61 +46,4 @@ var vpopcntdq = []*inst.Instruction{
|
|||||||
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
|
// {zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
|
||||||
// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
|
// {zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
|
||||||
// }
|
// }
|
||||||
func vpopcntdqforms(mbcst string) inst.Forms {
|
func vpopcntdqforms(bcst string) inst.Forms { return _yvexpandpd("AVX512VPOPCNTDQ", bcst) }
|
||||||
return inst.Forms{
|
|
||||||
// EVEX.128.66.0F38.W0 55 /r VPOPCNTD xmm1{k1}{z}, xmm2/m128/m32bcst
|
|
||||||
// EVEX.128.66.0F38.W1 55 /r VPOPCNTQ xmm1{k1}{z}, xmm2/m128/m64bcst
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "m128/" + mbcst, Action: inst.R},
|
|
||||||
{Type: "xmm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "xmm", Action: inst.R},
|
|
||||||
{Type: "xmm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
// EVEX.256.66.0F38.W0 55 /r VPOPCNTD ymm1{k1}{z}, ymm2/m256/m32bcst
|
|
||||||
// EVEX.256.66.0F38.W1 55 /r VPOPCNTQ ymm1{k1}{z}, ymm2/m256/m64bcst
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "m256/" + mbcst, Action: inst.R},
|
|
||||||
{Type: "ymm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "ymm", Action: inst.R},
|
|
||||||
{Type: "ymm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
// EVEX.512.66.0F38.W0 55 /r VPOPCNTD zmm1{k1}{z}, zmm2/m512/m32bcst
|
|
||||||
// EVEX.512.66.0F38.W1 55 /r VPOPCNTQ zmm1{k1}{z}, zmm2/m512/m64bcst
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "m512/" + mbcst, Action: inst.R},
|
|
||||||
{Type: "zmm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
ISA: []string{"AVX512VPOPCNTDQ"},
|
|
||||||
Operands: []inst.Operand{
|
|
||||||
{Type: "zmm", Action: inst.R},
|
|
||||||
{Type: "zmm{k}{z}", Action: inst.W},
|
|
||||||
},
|
|
||||||
EncodingType: inst.EncodingTypeEVEX,
|
|
||||||
},
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|||||||
738
x86/zctors.go
738
x86/zctors.go
@@ -26265,6 +26265,37 @@ func VPCMPW(ops ...operand.Op) (*intrep.Instruction, error) {
|
|||||||
return build(opcVPCMPW.Forms(), sffxs{}, ops)
|
return build(opcVPCMPW.Forms(), sffxs{}, ops)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// VPCOMPRESSB: Store Sparse Packed Byte Integer Values into Dense Memory/Register.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPCOMPRESSB xmm k m128
|
||||||
|
// VPCOMPRESSB xmm k xmm
|
||||||
|
// VPCOMPRESSB xmm m128
|
||||||
|
// VPCOMPRESSB xmm xmm
|
||||||
|
// VPCOMPRESSB ymm k m256
|
||||||
|
// VPCOMPRESSB ymm k ymm
|
||||||
|
// VPCOMPRESSB ymm m256
|
||||||
|
// VPCOMPRESSB ymm ymm
|
||||||
|
// VPCOMPRESSB zmm k m512
|
||||||
|
// VPCOMPRESSB zmm k zmm
|
||||||
|
// VPCOMPRESSB zmm m512
|
||||||
|
// VPCOMPRESSB zmm zmm
|
||||||
|
func VPCOMPRESSB(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPCOMPRESSB.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPCOMPRESSB_Z: Store Sparse Packed Byte Integer Values into Dense Memory/Register (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPCOMPRESSB.Z xmm k xmm
|
||||||
|
// VPCOMPRESSB.Z ymm k ymm
|
||||||
|
// VPCOMPRESSB.Z zmm k zmm
|
||||||
|
func VPCOMPRESSB_Z(xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPCOMPRESSB.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
// VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
|
// VPCOMPRESSD: Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
|
||||||
//
|
//
|
||||||
// Forms:
|
// Forms:
|
||||||
@@ -26333,6 +26364,37 @@ func VPCOMPRESSQ_Z(xyz, k, mxyz operand.Op) (*intrep.Instruction, error) {
|
|||||||
return build(opcVPCOMPRESSQ.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
|
return build(opcVPCOMPRESSQ.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, mxyz})
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// VPCOMPRESSW: Store Sparse Packed Word Integer Values into Dense Memory/Register.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPCOMPRESSW xmm k m128
|
||||||
|
// VPCOMPRESSW xmm k xmm
|
||||||
|
// VPCOMPRESSW xmm m128
|
||||||
|
// VPCOMPRESSW xmm xmm
|
||||||
|
// VPCOMPRESSW ymm k m256
|
||||||
|
// VPCOMPRESSW ymm k ymm
|
||||||
|
// VPCOMPRESSW ymm m256
|
||||||
|
// VPCOMPRESSW ymm ymm
|
||||||
|
// VPCOMPRESSW zmm k m512
|
||||||
|
// VPCOMPRESSW zmm k zmm
|
||||||
|
// VPCOMPRESSW zmm m512
|
||||||
|
// VPCOMPRESSW zmm zmm
|
||||||
|
func VPCOMPRESSW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPCOMPRESSW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPCOMPRESSW_Z: Store Sparse Packed Word Integer Values into Dense Memory/Register (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPCOMPRESSW.Z xmm k xmm
|
||||||
|
// VPCOMPRESSW.Z ymm k ymm
|
||||||
|
// VPCOMPRESSW.Z zmm k zmm
|
||||||
|
func VPCOMPRESSW_Z(xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPCOMPRESSW.Forms(), sffxs{sffxZ}, []operand.Op{xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
// VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register.
|
// VPCONFLICTD: Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register.
|
||||||
//
|
//
|
||||||
// Forms:
|
// Forms:
|
||||||
@@ -27791,6 +27853,40 @@ func VPERMW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
|||||||
return build(opcVPERMW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
return build(opcVPERMW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// VPEXPANDB: Load Sparse Packed Byte Integer Values from Dense Memory/Register.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPEXPANDB m128 k xmm
|
||||||
|
// VPEXPANDB m128 xmm
|
||||||
|
// VPEXPANDB m256 k ymm
|
||||||
|
// VPEXPANDB m256 ymm
|
||||||
|
// VPEXPANDB xmm k xmm
|
||||||
|
// VPEXPANDB xmm xmm
|
||||||
|
// VPEXPANDB ymm k ymm
|
||||||
|
// VPEXPANDB ymm ymm
|
||||||
|
// VPEXPANDB m512 k zmm
|
||||||
|
// VPEXPANDB m512 zmm
|
||||||
|
// VPEXPANDB zmm k zmm
|
||||||
|
// VPEXPANDB zmm zmm
|
||||||
|
func VPEXPANDB(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPEXPANDB.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPEXPANDB_Z: Load Sparse Packed Byte Integer Values from Dense Memory/Register (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPEXPANDB.Z m128 k xmm
|
||||||
|
// VPEXPANDB.Z m256 k ymm
|
||||||
|
// VPEXPANDB.Z xmm k xmm
|
||||||
|
// VPEXPANDB.Z ymm k ymm
|
||||||
|
// VPEXPANDB.Z m512 k zmm
|
||||||
|
// VPEXPANDB.Z zmm k zmm
|
||||||
|
func VPEXPANDB_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPEXPANDB.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
|
||||||
|
}
|
||||||
|
|
||||||
// VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register.
|
// VPEXPANDD: Load Sparse Packed Doubleword Integer Values from Dense Memory/Register.
|
||||||
//
|
//
|
||||||
// Forms:
|
// Forms:
|
||||||
@@ -27859,6 +27955,40 @@ func VPEXPANDQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
|
|||||||
return build(opcVPEXPANDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
|
return build(opcVPEXPANDQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// VPEXPANDW: Load Sparse Packed Word Integer Values from Dense Memory/Register.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPEXPANDW m128 k xmm
|
||||||
|
// VPEXPANDW m128 xmm
|
||||||
|
// VPEXPANDW m256 k ymm
|
||||||
|
// VPEXPANDW m256 ymm
|
||||||
|
// VPEXPANDW xmm k xmm
|
||||||
|
// VPEXPANDW xmm xmm
|
||||||
|
// VPEXPANDW ymm k ymm
|
||||||
|
// VPEXPANDW ymm ymm
|
||||||
|
// VPEXPANDW m512 k zmm
|
||||||
|
// VPEXPANDW m512 zmm
|
||||||
|
// VPEXPANDW zmm k zmm
|
||||||
|
// VPEXPANDW zmm zmm
|
||||||
|
func VPEXPANDW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPEXPANDW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPEXPANDW_Z: Load Sparse Packed Word Integer Values from Dense Memory/Register (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPEXPANDW.Z m128 k xmm
|
||||||
|
// VPEXPANDW.Z m256 k ymm
|
||||||
|
// VPEXPANDW.Z xmm k xmm
|
||||||
|
// VPEXPANDW.Z ymm k ymm
|
||||||
|
// VPEXPANDW.Z m512 k zmm
|
||||||
|
// VPEXPANDW.Z zmm k zmm
|
||||||
|
func VPEXPANDW_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPEXPANDW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
|
||||||
|
}
|
||||||
|
|
||||||
// VPEXTRB: Extract Byte.
|
// VPEXTRB: Extract Byte.
|
||||||
//
|
//
|
||||||
// Forms:
|
// Forms:
|
||||||
@@ -31540,6 +31670,614 @@ func VPSCATTERQQ(xyz, k, v operand.Op) (*intrep.Instruction, error) {
|
|||||||
return build(opcVPSCATTERQQ.Forms(), sffxs{}, []operand.Op{xyz, k, v})
|
return build(opcVPSCATTERQQ.Forms(), sffxs{}, []operand.Op{xyz, k, v})
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// VPSHLDD: Concatenate Dwords and Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDD imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDD imm8 m128 xmm xmm
|
||||||
|
// VPSHLDD imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDD imm8 m256 ymm ymm
|
||||||
|
// VPSHLDD imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDD imm8 xmm xmm xmm
|
||||||
|
// VPSHLDD imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDD imm8 ymm ymm ymm
|
||||||
|
// VPSHLDD imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDD imm8 m512 zmm zmm
|
||||||
|
// VPSHLDD imm8 zmm zmm k zmm
|
||||||
|
// VPSHLDD imm8 zmm zmm zmm
|
||||||
|
func VPSHLDD(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDD.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDD_BCST: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDD.BCST imm8 m32 xmm k xmm
|
||||||
|
// VPSHLDD.BCST imm8 m32 xmm xmm
|
||||||
|
// VPSHLDD.BCST imm8 m32 ymm k ymm
|
||||||
|
// VPSHLDD.BCST imm8 m32 ymm ymm
|
||||||
|
// VPSHLDD.BCST imm8 m32 zmm k zmm
|
||||||
|
// VPSHLDD.BCST imm8 m32 zmm zmm
|
||||||
|
func VPSHLDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDD.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDD_BCST_Z: Concatenate Dwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDD.BCST.Z imm8 m32 xmm k xmm
|
||||||
|
// VPSHLDD.BCST.Z imm8 m32 ymm k ymm
|
||||||
|
// VPSHLDD.BCST.Z imm8 m32 zmm k zmm
|
||||||
|
func VPSHLDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDD_Z: Concatenate Dwords and Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDD.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDD.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDD.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDD.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDD.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDD.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHLDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDQ: Concatenate Quadwords and Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDQ imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDQ imm8 m128 xmm xmm
|
||||||
|
// VPSHLDQ imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDQ imm8 m256 ymm ymm
|
||||||
|
// VPSHLDQ imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDQ imm8 xmm xmm xmm
|
||||||
|
// VPSHLDQ imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDQ imm8 ymm ymm ymm
|
||||||
|
// VPSHLDQ imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDQ imm8 m512 zmm zmm
|
||||||
|
// VPSHLDQ imm8 zmm zmm k zmm
|
||||||
|
// VPSHLDQ imm8 zmm zmm zmm
|
||||||
|
func VPSHLDQ(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDQ.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDQ_BCST: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDQ.BCST imm8 m64 xmm k xmm
|
||||||
|
// VPSHLDQ.BCST imm8 m64 xmm xmm
|
||||||
|
// VPSHLDQ.BCST imm8 m64 ymm k ymm
|
||||||
|
// VPSHLDQ.BCST imm8 m64 ymm ymm
|
||||||
|
// VPSHLDQ.BCST imm8 m64 zmm k zmm
|
||||||
|
// VPSHLDQ.BCST imm8 m64 zmm zmm
|
||||||
|
func VPSHLDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDQ.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDQ.BCST.Z imm8 m64 xmm k xmm
|
||||||
|
// VPSHLDQ.BCST.Z imm8 m64 ymm k ymm
|
||||||
|
// VPSHLDQ.BCST.Z imm8 m64 zmm k zmm
|
||||||
|
func VPSHLDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDQ_Z: Concatenate Quadwords and Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDQ.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDQ.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDQ.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDQ.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDQ.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDQ.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHLDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVD: Concatenate Dwords and Variable Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVD m128 xmm k xmm
|
||||||
|
// VPSHLDVD m128 xmm xmm
|
||||||
|
// VPSHLDVD m256 ymm k ymm
|
||||||
|
// VPSHLDVD m256 ymm ymm
|
||||||
|
// VPSHLDVD xmm xmm k xmm
|
||||||
|
// VPSHLDVD xmm xmm xmm
|
||||||
|
// VPSHLDVD ymm ymm k ymm
|
||||||
|
// VPSHLDVD ymm ymm ymm
|
||||||
|
// VPSHLDVD m512 zmm k zmm
|
||||||
|
// VPSHLDVD m512 zmm zmm
|
||||||
|
// VPSHLDVD zmm zmm k zmm
|
||||||
|
// VPSHLDVD zmm zmm zmm
|
||||||
|
func VPSHLDVD(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVD.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVD.BCST m32 xmm k xmm
|
||||||
|
// VPSHLDVD.BCST m32 xmm xmm
|
||||||
|
// VPSHLDVD.BCST m32 ymm k ymm
|
||||||
|
// VPSHLDVD.BCST m32 ymm ymm
|
||||||
|
// VPSHLDVD.BCST m32 zmm k zmm
|
||||||
|
// VPSHLDVD.BCST m32 zmm zmm
|
||||||
|
func VPSHLDVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVD.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVD.BCST.Z m32 xmm k xmm
|
||||||
|
// VPSHLDVD.BCST.Z m32 ymm k ymm
|
||||||
|
// VPSHLDVD.BCST.Z m32 zmm k zmm
|
||||||
|
func VPSHLDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVD_Z: Concatenate Dwords and Variable Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVD.Z m128 xmm k xmm
|
||||||
|
// VPSHLDVD.Z m256 ymm k ymm
|
||||||
|
// VPSHLDVD.Z xmm xmm k xmm
|
||||||
|
// VPSHLDVD.Z ymm ymm k ymm
|
||||||
|
// VPSHLDVD.Z m512 zmm k zmm
|
||||||
|
// VPSHLDVD.Z zmm zmm k zmm
|
||||||
|
func VPSHLDVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVQ: Concatenate Quadwords and Variable Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVQ m128 xmm k xmm
|
||||||
|
// VPSHLDVQ m128 xmm xmm
|
||||||
|
// VPSHLDVQ m256 ymm k ymm
|
||||||
|
// VPSHLDVQ m256 ymm ymm
|
||||||
|
// VPSHLDVQ xmm xmm k xmm
|
||||||
|
// VPSHLDVQ xmm xmm xmm
|
||||||
|
// VPSHLDVQ ymm ymm k ymm
|
||||||
|
// VPSHLDVQ ymm ymm ymm
|
||||||
|
// VPSHLDVQ m512 zmm k zmm
|
||||||
|
// VPSHLDVQ m512 zmm zmm
|
||||||
|
// VPSHLDVQ zmm zmm k zmm
|
||||||
|
// VPSHLDVQ zmm zmm zmm
|
||||||
|
func VPSHLDVQ(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVQ.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVQ.BCST m64 xmm k xmm
|
||||||
|
// VPSHLDVQ.BCST m64 xmm xmm
|
||||||
|
// VPSHLDVQ.BCST m64 ymm k ymm
|
||||||
|
// VPSHLDVQ.BCST m64 ymm ymm
|
||||||
|
// VPSHLDVQ.BCST m64 zmm k zmm
|
||||||
|
// VPSHLDVQ.BCST m64 zmm zmm
|
||||||
|
func VPSHLDVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVQ.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVQ.BCST.Z m64 xmm k xmm
|
||||||
|
// VPSHLDVQ.BCST.Z m64 ymm k ymm
|
||||||
|
// VPSHLDVQ.BCST.Z m64 zmm k zmm
|
||||||
|
func VPSHLDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVQ.Z m128 xmm k xmm
|
||||||
|
// VPSHLDVQ.Z m256 ymm k ymm
|
||||||
|
// VPSHLDVQ.Z xmm xmm k xmm
|
||||||
|
// VPSHLDVQ.Z ymm ymm k ymm
|
||||||
|
// VPSHLDVQ.Z m512 zmm k zmm
|
||||||
|
// VPSHLDVQ.Z zmm zmm k zmm
|
||||||
|
func VPSHLDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVW: Concatenate Words and Variable Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVW m128 xmm k xmm
|
||||||
|
// VPSHLDVW m128 xmm xmm
|
||||||
|
// VPSHLDVW m256 ymm k ymm
|
||||||
|
// VPSHLDVW m256 ymm ymm
|
||||||
|
// VPSHLDVW xmm xmm k xmm
|
||||||
|
// VPSHLDVW xmm xmm xmm
|
||||||
|
// VPSHLDVW ymm ymm k ymm
|
||||||
|
// VPSHLDVW ymm ymm ymm
|
||||||
|
// VPSHLDVW m512 zmm k zmm
|
||||||
|
// VPSHLDVW m512 zmm zmm
|
||||||
|
// VPSHLDVW zmm zmm k zmm
|
||||||
|
// VPSHLDVW zmm zmm zmm
|
||||||
|
func VPSHLDVW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDVW_Z: Concatenate Words and Variable Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDVW.Z m128 xmm k xmm
|
||||||
|
// VPSHLDVW.Z m256 ymm k ymm
|
||||||
|
// VPSHLDVW.Z xmm xmm k xmm
|
||||||
|
// VPSHLDVW.Z ymm ymm k ymm
|
||||||
|
// VPSHLDVW.Z m512 zmm k zmm
|
||||||
|
// VPSHLDVW.Z zmm zmm k zmm
|
||||||
|
func VPSHLDVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDW: Concatenate Words and Shift Packed Data Left Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDW imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDW imm8 m128 xmm xmm
|
||||||
|
// VPSHLDW imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDW imm8 m256 ymm ymm
|
||||||
|
// VPSHLDW imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDW imm8 xmm xmm xmm
|
||||||
|
// VPSHLDW imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDW imm8 ymm ymm ymm
|
||||||
|
// VPSHLDW imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDW imm8 m512 zmm zmm
|
||||||
|
// VPSHLDW imm8 zmm zmm k zmm
|
||||||
|
// VPSHLDW imm8 zmm zmm zmm
|
||||||
|
func VPSHLDW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHLDW_Z: Concatenate Words and Shift Packed Data Left Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHLDW.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHLDW.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHLDW.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHLDW.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHLDW.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHLDW.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHLDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHLDW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDD: Concatenate Dwords and Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDD imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDD imm8 m128 xmm xmm
|
||||||
|
// VPSHRDD imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDD imm8 m256 ymm ymm
|
||||||
|
// VPSHRDD imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDD imm8 xmm xmm xmm
|
||||||
|
// VPSHRDD imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDD imm8 ymm ymm ymm
|
||||||
|
// VPSHRDD imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDD imm8 m512 zmm zmm
|
||||||
|
// VPSHRDD imm8 zmm zmm k zmm
|
||||||
|
// VPSHRDD imm8 zmm zmm zmm
|
||||||
|
func VPSHRDD(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDD.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDD_BCST: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDD.BCST imm8 m32 xmm k xmm
|
||||||
|
// VPSHRDD.BCST imm8 m32 xmm xmm
|
||||||
|
// VPSHRDD.BCST imm8 m32 ymm k ymm
|
||||||
|
// VPSHRDD.BCST imm8 m32 ymm ymm
|
||||||
|
// VPSHRDD.BCST imm8 m32 zmm k zmm
|
||||||
|
// VPSHRDD.BCST imm8 m32 zmm zmm
|
||||||
|
func VPSHRDD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDD.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDD_BCST_Z: Concatenate Dwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDD.BCST.Z imm8 m32 xmm k xmm
|
||||||
|
// VPSHRDD.BCST.Z imm8 m32 ymm k ymm
|
||||||
|
// VPSHRDD.BCST.Z imm8 m32 zmm k zmm
|
||||||
|
func VPSHRDD_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDD_Z: Concatenate Dwords and Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDD.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDD.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDD.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDD.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDD.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDD.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHRDD_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDD.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDQ: Concatenate Quadwords and Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDQ imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDQ imm8 m128 xmm xmm
|
||||||
|
// VPSHRDQ imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDQ imm8 m256 ymm ymm
|
||||||
|
// VPSHRDQ imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDQ imm8 xmm xmm xmm
|
||||||
|
// VPSHRDQ imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDQ imm8 ymm ymm ymm
|
||||||
|
// VPSHRDQ imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDQ imm8 m512 zmm zmm
|
||||||
|
// VPSHRDQ imm8 zmm zmm k zmm
|
||||||
|
// VPSHRDQ imm8 zmm zmm zmm
|
||||||
|
func VPSHRDQ(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDQ.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDQ_BCST: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDQ.BCST imm8 m64 xmm k xmm
|
||||||
|
// VPSHRDQ.BCST imm8 m64 xmm xmm
|
||||||
|
// VPSHRDQ.BCST imm8 m64 ymm k ymm
|
||||||
|
// VPSHRDQ.BCST imm8 m64 ymm ymm
|
||||||
|
// VPSHRDQ.BCST imm8 m64 zmm k zmm
|
||||||
|
// VPSHRDQ.BCST imm8 m64 zmm zmm
|
||||||
|
func VPSHRDQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDQ.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDQ_BCST_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDQ.BCST.Z imm8 m64 xmm k xmm
|
||||||
|
// VPSHRDQ.BCST.Z imm8 m64 ymm k ymm
|
||||||
|
// VPSHRDQ.BCST.Z imm8 m64 zmm k zmm
|
||||||
|
func VPSHRDQ_BCST_Z(i, m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{i, m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDQ_Z: Concatenate Quadwords and Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDQ.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDQ.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDQ.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDQ.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDQ.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDQ.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHRDQ_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDQ.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVD: Concatenate Dwords and Variable Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVD m128 xmm k xmm
|
||||||
|
// VPSHRDVD m128 xmm xmm
|
||||||
|
// VPSHRDVD m256 ymm k ymm
|
||||||
|
// VPSHRDVD m256 ymm ymm
|
||||||
|
// VPSHRDVD xmm xmm k xmm
|
||||||
|
// VPSHRDVD xmm xmm xmm
|
||||||
|
// VPSHRDVD ymm ymm k ymm
|
||||||
|
// VPSHRDVD ymm ymm ymm
|
||||||
|
// VPSHRDVD m512 zmm k zmm
|
||||||
|
// VPSHRDVD m512 zmm zmm
|
||||||
|
// VPSHRDVD zmm zmm k zmm
|
||||||
|
// VPSHRDVD zmm zmm zmm
|
||||||
|
func VPSHRDVD(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVD.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVD_BCST: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVD.BCST m32 xmm k xmm
|
||||||
|
// VPSHRDVD.BCST m32 xmm xmm
|
||||||
|
// VPSHRDVD.BCST m32 ymm k ymm
|
||||||
|
// VPSHRDVD.BCST m32 ymm ymm
|
||||||
|
// VPSHRDVD.BCST m32 zmm k zmm
|
||||||
|
// VPSHRDVD.BCST m32 zmm zmm
|
||||||
|
func VPSHRDVD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVD.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVD_BCST_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVD.BCST.Z m32 xmm k xmm
|
||||||
|
// VPSHRDVD.BCST.Z m32 ymm k ymm
|
||||||
|
// VPSHRDVD.BCST.Z m32 zmm k zmm
|
||||||
|
func VPSHRDVD_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVD_Z: Concatenate Dwords and Variable Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVD.Z m128 xmm k xmm
|
||||||
|
// VPSHRDVD.Z m256 ymm k ymm
|
||||||
|
// VPSHRDVD.Z xmm xmm k xmm
|
||||||
|
// VPSHRDVD.Z ymm ymm k ymm
|
||||||
|
// VPSHRDVD.Z m512 zmm k zmm
|
||||||
|
// VPSHRDVD.Z zmm zmm k zmm
|
||||||
|
func VPSHRDVD_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVQ: Concatenate Quadwords and Variable Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVQ m128 xmm k xmm
|
||||||
|
// VPSHRDVQ m128 xmm xmm
|
||||||
|
// VPSHRDVQ m256 ymm k ymm
|
||||||
|
// VPSHRDVQ m256 ymm ymm
|
||||||
|
// VPSHRDVQ xmm xmm k xmm
|
||||||
|
// VPSHRDVQ xmm xmm xmm
|
||||||
|
// VPSHRDVQ ymm ymm k ymm
|
||||||
|
// VPSHRDVQ ymm ymm ymm
|
||||||
|
// VPSHRDVQ m512 zmm k zmm
|
||||||
|
// VPSHRDVQ m512 zmm zmm
|
||||||
|
// VPSHRDVQ zmm zmm k zmm
|
||||||
|
// VPSHRDVQ zmm zmm zmm
|
||||||
|
func VPSHRDVQ(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVQ.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVQ_BCST: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVQ.BCST m64 xmm k xmm
|
||||||
|
// VPSHRDVQ.BCST m64 xmm xmm
|
||||||
|
// VPSHRDVQ.BCST m64 ymm k ymm
|
||||||
|
// VPSHRDVQ.BCST m64 ymm ymm
|
||||||
|
// VPSHRDVQ.BCST m64 zmm k zmm
|
||||||
|
// VPSHRDVQ.BCST m64 zmm zmm
|
||||||
|
func VPSHRDVQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVQ.Forms(), sffxs{sffxBCST}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVQ_BCST_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Broadcast, Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVQ.BCST.Z m64 xmm k xmm
|
||||||
|
// VPSHRDVQ.BCST.Z m64 ymm k ymm
|
||||||
|
// VPSHRDVQ.BCST.Z m64 zmm k zmm
|
||||||
|
func VPSHRDVQ_BCST_Z(m, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVQ_Z: Concatenate Quadwords and Variable Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVQ.Z m128 xmm k xmm
|
||||||
|
// VPSHRDVQ.Z m256 ymm k ymm
|
||||||
|
// VPSHRDVQ.Z xmm xmm k xmm
|
||||||
|
// VPSHRDVQ.Z ymm ymm k ymm
|
||||||
|
// VPSHRDVQ.Z m512 zmm k zmm
|
||||||
|
// VPSHRDVQ.Z zmm zmm k zmm
|
||||||
|
func VPSHRDVQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVW: Concatenate Words and Variable Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVW m128 xmm k xmm
|
||||||
|
// VPSHRDVW m128 xmm xmm
|
||||||
|
// VPSHRDVW m256 ymm k ymm
|
||||||
|
// VPSHRDVW m256 ymm ymm
|
||||||
|
// VPSHRDVW xmm xmm k xmm
|
||||||
|
// VPSHRDVW xmm xmm xmm
|
||||||
|
// VPSHRDVW ymm ymm k ymm
|
||||||
|
// VPSHRDVW ymm ymm ymm
|
||||||
|
// VPSHRDVW m512 zmm k zmm
|
||||||
|
// VPSHRDVW m512 zmm zmm
|
||||||
|
// VPSHRDVW zmm zmm k zmm
|
||||||
|
// VPSHRDVW zmm zmm zmm
|
||||||
|
func VPSHRDVW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDVW_Z: Concatenate Words and Variable Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDVW.Z m128 xmm k xmm
|
||||||
|
// VPSHRDVW.Z m256 ymm k ymm
|
||||||
|
// VPSHRDVW.Z xmm xmm k xmm
|
||||||
|
// VPSHRDVW.Z ymm ymm k ymm
|
||||||
|
// VPSHRDVW.Z m512 zmm k zmm
|
||||||
|
// VPSHRDVW.Z zmm zmm k zmm
|
||||||
|
func VPSHRDVW_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDVW.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDW: Concatenate Words and Shift Packed Data Right Logical.
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDW imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDW imm8 m128 xmm xmm
|
||||||
|
// VPSHRDW imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDW imm8 m256 ymm ymm
|
||||||
|
// VPSHRDW imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDW imm8 xmm xmm xmm
|
||||||
|
// VPSHRDW imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDW imm8 ymm ymm ymm
|
||||||
|
// VPSHRDW imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDW imm8 m512 zmm zmm
|
||||||
|
// VPSHRDW imm8 zmm zmm k zmm
|
||||||
|
// VPSHRDW imm8 zmm zmm zmm
|
||||||
|
func VPSHRDW(ops ...operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDW.Forms(), sffxs{}, ops)
|
||||||
|
}
|
||||||
|
|
||||||
|
// VPSHRDW_Z: Concatenate Words and Shift Packed Data Right Logical (Zeroing Masking).
|
||||||
|
//
|
||||||
|
// Forms:
|
||||||
|
//
|
||||||
|
// VPSHRDW.Z imm8 m128 xmm k xmm
|
||||||
|
// VPSHRDW.Z imm8 m256 ymm k ymm
|
||||||
|
// VPSHRDW.Z imm8 xmm xmm k xmm
|
||||||
|
// VPSHRDW.Z imm8 ymm ymm k ymm
|
||||||
|
// VPSHRDW.Z imm8 m512 zmm k zmm
|
||||||
|
// VPSHRDW.Z imm8 zmm zmm k zmm
|
||||||
|
func VPSHRDW_Z(i, mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
|
||||||
|
return build(opcVPSHRDW.Forms(), sffxs{sffxZ}, []operand.Op{i, mxyz, xyz, k, xyz1})
|
||||||
|
}
|
||||||
|
|
||||||
// VPSHUFB: Packed Shuffle Bytes.
|
// VPSHUFB: Packed Shuffle Bytes.
|
||||||
//
|
//
|
||||||
// Forms:
|
// Forms:
|
||||||
|
|||||||
1206
x86/zctors_test.go
1206
x86/zctors_test.go
File diff suppressed because it is too large
Load Diff
978
x86/zoptab.go
978
x86/zoptab.go
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user