8 Commits

Author	SHA1	Message	Date
Michael McLoughlin	18cdf50d7c	reg: support for register casting ... Adds methods for referencing sub- or super-registers. For example, for general purpose registers you can now reference As8(), As16(), ... and for vector AsX(), AsY(), AsZ(). Closes #1	2018-12-30 18:40:45 -08:00
Michael McLoughlin	8282c9b17e	fix operand check tests	2018-12-14 22:12:28 -08:00
Michael McLoughlin	5431f2edef	support signatures and param load/stores	2018-12-08 21:16:03 -08:00
Michael McLoughlin	43575d8b61	start at some basic passes	2018-12-02 13:51:03 -08:00
Michael McLoughlin	4395adacc8	x86: rel types and generated tests	2018-11-27 22:08:11 -08:00
Michael McLoughlin	3881907ec8	implement vm{32,64}{x,y} operand checks	2018-11-26 23:53:07 -08:00
Michael McLoughlin	0ec52ceaa8	add IsM* operand checks	2018-11-26 23:35:26 -08:00
Michael McLoughlin	3050882621	start to implement operand types and checks	2018-11-26 22:14:36 -08:00