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Michael McLoughlin 7d4e18f4f4 ast: {Input,Output}Registers()

2018-12-02 22:29:30 -08:00

start at some basic passes

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first pass at a "builder" interface

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ctors: include implicit inputs/outputs

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ast: {Input,Output}Registers()

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add reg.Type

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rename some register types

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start a lint script

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ctors: include implicit inputs/outputs

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.travis.yml

travis: remove -v from go test

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ast.go

ast: {Input,Output}Registers()

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LICENSE

Initial commit

2018-11-04 09:44:22 -08:00

printer.go

start at some basic passes

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README.md

Update README.md

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README.md

avo

Golang x86 assembly generator. Inspired by PeachPy.